Home
last modified time | relevance | path

Searched full:sd3_dat0 (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-dhcom-drc02.dtsi14 * pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2
109 * disabled, because the pins SD3_DAT0 and SD3_DAT1 are muxed as
H A Dimx6qdl-dhcom-som.dtsi89 * pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2
/openbmc/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a77990.c167 #define GPSR4_2 F_(SD3_DAT0, IP9_23_20)
295 #define IP9_23_20 FM(SD3_DAT0) FM(NFDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, …
1031 PINMUX_IPSR_GPSR(IP9_23_20, SD3_DAT0),
5028 { RCAR_GP_PIN(4, 2), 8, 2 }, /* SD3_DAT0 */
5199 [19] = RCAR_GP_PIN(4, 2), /* SD3_DAT0 */
H A Dpfc-r8a77965.c178 #define GPSR4_9 F_(SD3_DAT0, IP10_7_4)
343 #define IP10_7_4 FM(SD3_DAT0) F_(0, 0) FM(NFDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0…
1132 PINMUX_IPSR_GPSR(IP10_7_4, SD3_DAT0),
5966 { RCAR_GP_PIN(4, 9), 0, 3 }, /* SD3_DAT0 */
6221 [31] = RCAR_GP_PIN(4, 9), /* SD3_DAT0 */
H A Dpfc-r8a77951.c173 #define GPSR4_9 F_(SD3_DAT0, IP10_7_4)
338 #define IP10_7_4 FM(SD3_DAT0) F_(0, 0) FM(NFDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0…
1126 PINMUX_IPSR_GPSR(IP10_7_4, SD3_DAT0),
5773 { RCAR_GP_PIN(4, 9), 0, 3 }, /* SD3_DAT0 */
6028 [31] = RCAR_GP_PIN(4, 9), /* SD3_DAT0 */
H A Dpfc-r8a7796.c178 #define GPSR4_9 F_(SD3_DAT0, IP10_7_4)
343 #define IP10_7_4 FM(SD3_DAT0) F_(0, 0) FM(NFDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0…
1129 PINMUX_IPSR_GPSR(IP10_7_4, SD3_DAT0),
5725 { RCAR_GP_PIN(4, 9), 0, 3 }, /* SD3_DAT0 */
5980 [31] = RCAR_GP_PIN(4, 9), /* SD3_DAT0 */
H A Dpfc-r8a7790.c1418 PINMUX_IPSR_GPSR(IP11_8_7, SD3_DAT0),
6006 [26] = RCAR_GP_PIN(3, 26), /* SD3_DAT0 */
H A Dpfc-r8a7779.c996 PINMUX_IPSR_GPSR(IP4_31_29, SD3_DAT0),
/openbmc/u-boot/drivers/pinctrl/renesas/
H A Dpfc-r8a7795.c131 #define GPSR4_9 F_(SD3_DAT0, IP10_7_4)
296 #define IP10_7_4 FM(SD3_DAT0) F_(0, 0) FM(NFDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0…
1079 PINMUX_IPSR_GPSR(IP10_7_4, SD3_DAT0),
5793 { RCAR_GP_PIN(4, 9), 0, 3 }, /* SD3_DAT0 */
6046 [31] = RCAR_GP_PIN(4, 9), /* SD3_DAT0 */
H A Dpfc-r8a7796.c137 #define GPSR4_9 F_(SD3_DAT0, IP10_7_4)
302 #define IP10_7_4 FM(SD3_DAT0) F_(0, 0) FM(NFDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0…
1080 PINMUX_IPSR_GPSR(IP10_7_4, SD3_DAT0),
5748 { RCAR_GP_PIN(4, 9), 0, 3 }, /* SD3_DAT0 */
6001 [31] = RCAR_GP_PIN(4, 9), /* SD3_DAT0 */
H A Dpfc-r8a77990.c142 #define GPSR4_2 F_(SD3_DAT0, IP9_23_20)
270 #define IP9_23_20 FM(SD3_DAT0) FM(NFDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, …
1001 PINMUX_IPSR_GPSR(IP9_23_20, SD3_DAT0),
H A Dpfc-r8a7790.c1412 PINMUX_IPSR_GPSR(IP11_8_7, SD3_DAT0),