/openbmc/linux/Documentation/devicetree/bindings/iio/adc/ |
H A D | rockchip-saradc.yaml | 77 clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
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/openbmc/u-boot/include/dt-bindings/clock/ |
H A D | rk3128-cru.h | 31 #define SCLK_SARADC 91 macro
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H A D | rk3188-cru-common.h | 27 #define SCLK_SARADC 71 macro
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H A D | rv1108-cru.h | 59 #define SCLK_SARADC 109 macro
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H A D | rk3368-cru.h | 37 #define SCLK_SARADC 73 macro
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H A D | rk3328-cru.h | 25 #define SCLK_SARADC 37 macro
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H A D | rk3288-cru.h | 25 #define SCLK_SARADC 73 macro
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H A D | rk3399-cru.h | 36 #define SCLK_SARADC 80 macro
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/openbmc/linux/include/dt-bindings/clock/ |
H A D | rk3188-cru-common.h | 27 #define SCLK_SARADC 71 macro
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H A D | rk3128-cru.h | 37 #define SCLK_SARADC 91 macro
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H A D | rv1108-cru.h | 59 #define SCLK_SARADC 109 macro
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H A D | px30-cru.h | 47 #define SCLK_SARADC 45 macro
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H A D | rk3368-cru.h | 28 #define SCLK_SARADC 73 macro
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H A D | rk3308-cru.h | 41 #define SCLK_SARADC 37 macro
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H A D | rk3328-cru.h | 26 #define SCLK_SARADC 37 macro
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H A D | rk3288-cru.h | 28 #define SCLK_SARADC 73 macro
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H A D | rk3399-cru.h | 37 #define SCLK_SARADC 80 macro
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/openbmc/u-boot/drivers/clk/rockchip/ |
H A D | clk_rk3128.c | 494 case SCLK_SARADC: in rk3128_clk_get_rate() 531 case SCLK_SARADC: in rk3128_clk_set_rate()
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H A D | clk_rk3368.c | 474 case SCLK_SARADC: in rk3368_clk_get_rate() 511 case SCLK_SARADC: in rk3368_clk_set_rate()
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H A D | clk_rv1108.c | 541 case SCLK_SARADC: in rv1108_clk_get_rate() 583 case SCLK_SARADC: in rv1108_clk_set_rate()
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H A D | clk_rk3328.c | 575 case SCLK_SARADC: in rk3328_clk_get_rate() 611 case SCLK_SARADC: in rk3328_clk_set_rate()
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H A D | clk_rk3288.c | 775 case SCLK_SARADC: in rk3288_clk_get_rate() 871 case SCLK_SARADC: in rk3288_clk_set_rate()
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/openbmc/linux/drivers/clk/rockchip/ |
H A D | clk-rk3128.c | 390 COMPOSITE_NOMUX(SCLK_SARADC, "sclk_saradc", "xin24m", 0,
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/openbmc/u-boot/arch/arm/dts/ |
H A D | rk3xxx.dtsi | 386 clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3xxx.dtsi | 444 clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
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