Home
last modified time | relevance | path

Searched full:sclk_saradc (Results 1 – 25 of 48) sorted by relevance

12

/openbmc/linux/Documentation/devicetree/bindings/iio/adc/
H A Drockchip-saradc.yaml77 clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3128-cru.h31 #define SCLK_SARADC 91 macro
H A Drk3188-cru-common.h27 #define SCLK_SARADC 71 macro
H A Drv1108-cru.h59 #define SCLK_SARADC 109 macro
H A Drk3368-cru.h37 #define SCLK_SARADC 73 macro
H A Drk3328-cru.h25 #define SCLK_SARADC 37 macro
H A Drk3288-cru.h25 #define SCLK_SARADC 73 macro
H A Drk3399-cru.h36 #define SCLK_SARADC 80 macro
/openbmc/linux/include/dt-bindings/clock/
H A Drk3188-cru-common.h27 #define SCLK_SARADC 71 macro
H A Drk3128-cru.h37 #define SCLK_SARADC 91 macro
H A Drv1108-cru.h59 #define SCLK_SARADC 109 macro
H A Dpx30-cru.h47 #define SCLK_SARADC 45 macro
H A Drk3368-cru.h28 #define SCLK_SARADC 73 macro
H A Drk3308-cru.h41 #define SCLK_SARADC 37 macro
H A Drk3328-cru.h26 #define SCLK_SARADC 37 macro
H A Drk3288-cru.h28 #define SCLK_SARADC 73 macro
H A Drk3399-cru.h37 #define SCLK_SARADC 80 macro
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3128.c494 case SCLK_SARADC: in rk3128_clk_get_rate()
531 case SCLK_SARADC: in rk3128_clk_set_rate()
H A Dclk_rk3368.c474 case SCLK_SARADC: in rk3368_clk_get_rate()
511 case SCLK_SARADC: in rk3368_clk_set_rate()
H A Dclk_rv1108.c541 case SCLK_SARADC: in rv1108_clk_get_rate()
583 case SCLK_SARADC: in rv1108_clk_set_rate()
H A Dclk_rk3328.c575 case SCLK_SARADC: in rk3328_clk_get_rate()
611 case SCLK_SARADC: in rk3328_clk_set_rate()
H A Dclk_rk3288.c775 case SCLK_SARADC: in rk3288_clk_get_rate()
871 case SCLK_SARADC: in rk3288_clk_set_rate()
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3128.c390 COMPOSITE_NOMUX(SCLK_SARADC, "sclk_saradc", "xin24m", 0,
/openbmc/u-boot/arch/arm/dts/
H A Drk3xxx.dtsi386 clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3xxx.dtsi444 clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;

12