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/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dst,stm32-vrefbuf.yaml46 reg = <0x50025000 0x8>;
/openbmc/u-boot/arch/arm/dts/
H A Dstm32mp157c.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
21 reg = <0>;
34 cpu_off = <0x84000002>;
35 cpu_on = <0x84000003>;
64 reg = <0xa0021000 0x1000>,
65 <0xa0022000 0x2000>;
79 #clock-cells = <0>;
85 #clock-cells = <0>;
91 #clock-cells = <0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp151.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
22 reg = <0>;
42 reg = <0xa0021000 0x1000>,
43 <0xa0022000 0x2000>;
58 #clock-cells = <0>;
64 #clock-cells = <0>;
70 #clock-cells = <0>;
76 #clock-cells = <0>;
82 #clock-cells = <0>;
[all …]
/openbmc/qemu/hw/arm/
H A Darmsse.c54 int irq; /* NO_IRQ, or 0..NUM_SSE_IRQS-1, or NMI_0 or NMI_1 */
85 DEFINE_PROP_UINT32("init-svtor", ARMSSE, init_svtor, 0x10000000),
86 DEFINE_PROP_BOOL("CPU0_FPU", ARMSSE, cpu_fpu[0], true),
87 DEFINE_PROP_BOOL("CPU0_DSP", ARMSSE, cpu_dsp[0], true),
88 DEFINE_PROP_UINT32("CPU0_MPU_NS", ARMSSE, cpu_mpu_ns[0], 8),
89 DEFINE_PROP_UINT32("CPU0_MPU_S", ARMSSE, cpu_mpu_s[0], 8),
98 DEFINE_PROP_UINT32("init-svtor", ARMSSE, init_svtor, 0x10000000),
99 DEFINE_PROP_BOOL("CPU0_FPU", ARMSSE, cpu_fpu[0], false),
100 DEFINE_PROP_BOOL("CPU0_DSP", ARMSSE, cpu_dsp[0], false),
103 DEFINE_PROP_UINT32("CPU0_MPU_NS", ARMSSE, cpu_mpu_ns[0], 8),
[all …]