xref: /openbmc/qemu/include/hw/timer/cadence_ttc.h (revision 401d46789410e88e9e90d76a11f46e8e9f358d55)
1  /*
2   * Xilinx Zynq cadence TTC model
3   *
4   * Copyright (c) 2011 Xilinx Inc.
5   * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com)
6   * Copyright (c) 2012 PetaLogix Pty Ltd.
7   * Written By Haibing Ma
8   *            M. Habib
9   *
10   * This program is free software; you can redistribute it and/or
11   * modify it under the terms of the GNU General Public License
12   * as published by the Free Software Foundation; either version
13   * 2 of the License, or (at your option) any later version.
14   *
15   * You should have received a copy of the GNU General Public License along
16   * with this program; if not, see <http://www.gnu.org/licenses/>.
17   */
18  #ifndef HW_TIMER_CADENCE_TTC_H
19  #define HW_TIMER_CADENCE_TTC_H
20  
21  #include "hw/sysbus.h"
22  #include "qemu/timer.h"
23  
24  typedef struct {
25      QEMUTimer *timer;
26      int freq;
27  
28      uint32_t reg_clock;
29      uint32_t reg_count;
30      uint32_t reg_value;
31      uint16_t reg_interval;
32      uint16_t reg_match[3];
33      uint32_t reg_intr;
34      uint32_t reg_intr_en;
35      uint32_t reg_event_ctrl;
36      uint32_t reg_event;
37  
38      uint64_t cpu_time;
39      unsigned int cpu_time_valid;
40  
41      qemu_irq irq;
42  } CadenceTimerState;
43  
44  #define TYPE_CADENCE_TTC "cadence_ttc"
45  OBJECT_DECLARE_SIMPLE_TYPE(CadenceTTCState, CADENCE_TTC)
46  
47  struct CadenceTTCState {
48      SysBusDevice parent_obj;
49  
50      MemoryRegion iomem;
51      CadenceTimerState timer[3];
52  };
53  
54  #endif
55