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Searched refs:vpll_con0 (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dclock.h46 unsigned int vpll_con0; member
279 unsigned int vpll_con0; member
667 unsigned int vpll_con0; member
1064 unsigned int vpll_con0; member
/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock_init_exynos4.c91 writel(VPLL_CON0_VAL, &clk->vpll_con0); in system_clock_init()
H A Dclock_init_exynos5.c665 writel(val, &clk->vpll_con0); in exynos5250_system_clock_init()
666 while ((readl(&clk->vpll_con0) & VPLL_CON0_LOCKED) == 0) in exynos5250_system_clock_init()
885 writel(val, &clk->vpll_con0); in exynos5420_system_clock_init()
886 while ((readl(&clk->vpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
H A Dclock.c203 r = readl(&clk->vpll_con0); in exynos4_get_pll_clk()
233 r = readl(&clk->vpll_con0); in exynos4x12_get_pll_clk()
264 r = readl(&clk->vpll_con0); in exynos5_get_pll_clk()
322 r = readl(&clk->vpll_con0); in exynos542x_get_pll_clk()
/openbmc/u-boot/board/samsung/trats/
H A Dtrats.c346 writel(VPLL_CON0_VAL, (unsigned int)&clk->vpll_con0); in board_clock_init()