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Searched refs:uart_clk (Results 1 – 25 of 49) sorted by relevance

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/openbmc/linux/arch/arm/boot/dts/unisoc/
H A Drda8810pl-orangepi-2g-iot.dts30 uart_clk: uart-clk { label
39 clocks = <&uart_clk>;
44 clocks = <&uart_clk>;
49 clocks = <&uart_clk>;
H A Drda8810pl-orangepi-i96.dts30 uart_clk: uart-clk { label
39 clocks = <&uart_clk>;
44 clocks = <&uart_clk>;
49 clocks = <&uart_clk>;
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt6582.dtsi53 uart_clk: dummy26m { label
92 clocks = <&uart_clk>;
101 clocks = <&uart_clk>;
110 clocks = <&uart_clk>;
119 clocks = <&uart_clk>;
H A Dmt6589.dtsi63 uart_clk: dummy26m { label
108 clocks = <&uart_clk>;
116 clocks = <&uart_clk>;
124 clocks = <&uart_clk>;
132 clocks = <&uart_clk>;
H A Dmt6592.dtsi75 uart_clk: dummy26m { label
110 clocks = <&uart_clk>;
118 clocks = <&uart_clk>;
126 clocks = <&uart_clk>;
134 clocks = <&uart_clk>;
H A Dmt8127.dtsi74 uart_clk: dummy26m { label
135 clocks = <&uart_clk>;
143 clocks = <&uart_clk>;
151 clocks = <&uart_clk>;
159 clocks = <&uart_clk>;
H A Dmt6580.dtsi56 uart_clk: dummy26m { label
96 clocks = <&uart_clk>;
105 clocks = <&uart_clk>;
/openbmc/u-boot/board/freescale/b4860qds/
H A Dspl.c55 u32 plat_ratio, sys_clk, uart_clk; in board_init_f() local
72 uart_clk = sys_clk * plat_ratio / 2; in board_init_f()
75 uart_clk / 16 / CONFIG_BAUDRATE); in board_init_f()
/openbmc/u-boot/board/freescale/t104xrdb/
H A Dspl.c38 u32 plat_ratio, sys_clk, uart_clk; in board_init_f() local
80 uart_clk = sys_clk * plat_ratio / 2; in board_init_f()
83 uart_clk / 16 / CONFIG_BAUDRATE); in board_init_f()
/openbmc/linux/arch/mips/boot/dts/brcm/
H A Dbcm7125.dtsi39 uart_clk: uart_clk { label
125 clocks = <&uart_clk>;
137 clocks = <&uart_clk>;
149 clocks = <&uart_clk>;
H A Dbcm7420.dtsi39 uart_clk: uart_clk { label
125 clocks = <&uart_clk>;
136 clocks = <&uart_clk>;
147 clocks = <&uart_clk>;
H A Dbcm7358.dtsi33 uart_clk: uart_clk { label
136 clocks = <&uart_clk>;
148 clocks = <&uart_clk>;
160 clocks = <&uart_clk>;
/openbmc/linux/arch/arm64/boot/dts/broadcom/bcmbca/
H A Dbcm63146.dtsi65 uart_clk: uart-clk { label
126 clocks = <&uart_clk>, <&uart_clk>;
H A Dbcm63158.dtsi84 uart_clk: uart-clk { label
144 clocks = <&uart_clk>, <&uart_clk>;
H A Dbcm6813.dtsi84 uart_clk: uart-clk { label
145 clocks = <&uart_clk>, <&uart_clk>;
H A Dbcm4912.dtsi84 uart_clk: uart-clk { label
145 clocks = <&uart_clk>, <&uart_clk>;
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm6878.dtsi66 uart_clk: uart-clk { label
127 clocks = <&uart_clk>, <&uart_clk>;
H A Dbcm63178.dtsi76 uart_clk: uart-clk { label
136 clocks = <&uart_clk>, <&uart_clk>;
H A Dbcm6855.dtsi75 uart_clk: uart-clk { label
136 clocks = <&uart_clk>, <&uart_clk>;
H A Dbcm47622.dtsi85 uart_clk: uart-clk { label
145 clocks = <&uart_clk>, <&uart_clk>;
H A Dbcm6756.dtsi85 uart_clk: uart-clk { label
146 clocks = <&uart_clk>, <&uart_clk>;
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6755.dtsi82 uart_clk: dummy26m { label
126 clocks = <&uart_clk>;
135 clocks = <&uart_clk>;
/openbmc/linux/arch/arm/boot/dts/nspire/
H A Dnspire-cx.dts27 clocks = <&uart_clk>, <&apb_pclk>;
130 uart_clk: uart_clk { label
/openbmc/linux/drivers/tty/serial/8250/
H A D8250_mtk.c72 struct clk *uart_clk; member
478 data->uart_clk = devm_clk_get(&pdev->dev, "baud"); in mtk8250_probe_of()
479 if (IS_ERR(data->uart_clk)) { in mtk8250_probe_of()
484 data->uart_clk = devm_clk_get(&pdev->dev, NULL); in mtk8250_probe_of()
485 if (IS_ERR(data->uart_clk)) { in mtk8250_probe_of()
487 return PTR_ERR(data->uart_clk); in mtk8250_probe_of()
564 uart.port.uartclk = clk_get_rate(data->uart_clk); in mtk8250_probe()
/openbmc/linux/drivers/tty/serial/
H A Dserial-tegra.c110 struct clk *uart_clk; member
398 ret = clk_set_rate(tup->uart_clk, rate); in tegra_set_baudrate()
404 tup->configured_rate = clk_get_rate(tup->uart_clk); in tegra_set_baudrate()
410 rate = clk_get_rate(tup->uart_clk); in tegra_set_baudrate()
986 clk_disable_unprepare(tup->uart_clk); in tegra_uart_hw_deinit()
999 ret = clk_prepare_enable(tup->uart_clk); in tegra_uart_hw_init()
1051 clk_disable_unprepare(tup->uart_clk); in tegra_uart_hw_init()
1073 clk_disable_unprepare(tup->uart_clk); in tegra_uart_hw_init()
1239 clk_disable_unprepare(tup->uart_clk); in tegra_uart_startup()
1289 struct clk *parent_clk = clk_get_parent(tup->uart_clk); in tegra_uart_set_termios()
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