Searched refs:tte (Results 1 – 11 of 11) sorted by relevance
/openbmc/qemu/target/sparc/ |
H A D | cpu.h | 288 #define TTE_IS_VALID(tte) ((tte) & TTE_VALID_BIT) argument 289 #define TTE_IS_NFO(tte) ((tte) & TTE_NFO_BIT) argument 290 #define TTE_IS_IE(tte) ((tte) & TTE_IE_BIT) argument 291 #define TTE_IS_USED(tte) ((tte) & TTE_USED_BIT) argument 292 #define TTE_IS_LOCKED(tte) ((tte) & TTE_LOCKED_BIT) argument 293 #define TTE_IS_SIDEEFFECT(tte) ((tte) & TTE_SIDEEFFECT_BIT) argument 294 #define TTE_IS_SIDEEFFECT_UA2005(tte) ((tte) & TTE_SIDEEFFECT_BIT_UA2005) argument 295 #define TTE_IS_PRIV(tte) ((tte) & TTE_PRIV_BIT) argument 296 #define TTE_IS_W_OK(tte) ((tte) & TTE_W_OK_BIT) argument 298 #define TTE_IS_NFO_UA2005(tte) ((tte) & TTE_NFO_BIT_UA2005) argument [all …]
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H A D | mmu_helper.c | 488 uint64_t mask = -(8192ULL << 3 * TTE_PGSIZE(tlb->tte)); in ultrasparc_tag_match() 491 if (TTE_IS_VALID(tlb->tte) && in ultrasparc_tag_match() 492 (TTE_IS_GLOBAL(tlb->tte) || tlb_compare_context(tlb, context)) in ultrasparc_tag_match() 495 *physical = ((tlb->tte & mask) | (address & ~mask)) & 0x1ffffffe000ULL; in ultrasparc_tag_match() 581 if (TTE_IS_IE(env->dtlb[i].tte)) { in get_physical_address_data() 587 if (TTE_IS_PRIV(env->dtlb[i].tte) && is_user) { in get_physical_address_data() 593 if (TTE_IS_SIDEEFFECT(env->dtlb[i].tte)) { in get_physical_address_data() 598 if (TTE_IS_NFO(env->dtlb[i].tte)) { in get_physical_address_data() 607 } else if (!TTE_IS_W_OK(env->dtlb[i].tte) && (rw == 1)) { in get_physical_address_data() 616 if (TTE_IS_W_OK(env->dtlb[i].tte)) { in get_physical_address_data() [all …]
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H A D | ldst_helper.c | 129 if (TTE_IS_VALID(tlb->tte)) { in replace_tlb_entry() 132 size = 8192ULL << 3 * TTE_PGSIZE(tlb->tte); in replace_tlb_entry() 143 tlb->tte = tlb_tte; in replace_tlb_entry() 172 if (TTE_IS_VALID(tlb[i].tte)) { in demap_tlb() 176 if (TTE_IS_GLOBAL(tlb[i].tte) || in demap_tlb() 184 mask <<= 3 * ((tlb[i].tte >> 61) & 3); in demap_tlb() 191 if (!TTE_IS_GLOBAL(tlb[i].tte) && in demap_tlb() 243 uint64_t size = 8192ULL << 3 * TTE_PGSIZE(tlb[i].tte); in replace_tlb_1bit_lru() 256 if (!TTE_IS_VALID(tlb[i].tte)) { in replace_tlb_1bit_lru() 273 if (!TTE_IS_LOCKED(tlb[i].tte) && !TTE_IS_USED(tlb[i].tte)) { in replace_tlb_1bit_lru() [all …]
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H A D | machine.c | 47 VMSTATE_UINT64(tte, SparcTLBEntry),
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/openbmc/qemu/hw/sparc64/ |
H A D | sun4u_iommu.c | 81 uint64_t tte; in sun4u_translate_iommu() local 159 tte = address_space_ldq_be(&address_space_memory, baseaddr + offset, in sun4u_translate_iommu() 162 if (!(tte & IOMMU_TTE_DATA_V)) { in sun4u_translate_iommu() 167 if (tte & IOMMU_TTE_DATA_W) { in sun4u_translate_iommu() 175 if (tte & IOMMU_TTE_DATA_SIZE) { in sun4u_translate_iommu() 178 ret.translated_addr = tte & IOMMU_TTE_PHYS_MASK_64K; in sun4u_translate_iommu() 183 ret.translated_addr = tte & IOMMU_TTE_PHYS_MASK_8K; in sun4u_translate_iommu() 187 trace_sun4u_iommu_translate(ret.iova, ret.translated_addr, tte); in sun4u_translate_iommu()
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H A D | trace-events | 9 …ranslate(uint64_t addr, uint64_t trans_addr, uint64_t tte) "xlate 0x%"PRIx64" => pa 0x%"PRIx64" tt…
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/openbmc/linux/arch/sparc/mm/ |
H A D | tsb.c | 197 unsigned long page_sz, tte; in setup_tsb_params() local 215 tte = pgprot_val(PAGE_KERNEL_LOCKED); in setup_tsb_params() 271 tte |= pte_sz_bits(page_sz); in setup_tsb_params() 283 tte |= (tsb_paddr & ~(page_sz - 1UL)); in setup_tsb_params() 287 mm->context.tsb_block[tsb_idx].tsb_map_pte = tte; in setup_tsb_params()
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H A D | init_64.c | 319 unsigned long tte) in __update_mmu_tsb_insert() argument 330 tsb_insert(tsb, tag, tte); in __update_mmu_tsb_insert()
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/openbmc/linux/arch/sparc/include/asm/ |
H A D | hvtramp.h | 11 __u64 tte; member
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H A D | hypervisor.h | 772 unsigned long tte,
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/openbmc/linux/arch/sparc/kernel/ |
H A D | smp_64.c | 326 hdesc->maps[i].tte = tte_data; in ldom_startcpu_cpuid()
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