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Searched refs:tmp0 (Results 1 – 25 of 43) sorted by relevance

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/openbmc/linux/arch/mips/crypto/
H A Dpoly1305-mips.pl76 my ($in0,$in1,$tmp0,$tmp1,$tmp2,$tmp3,$tmp4) = ($a4,$a5,$a6,$a7,$at,$t0,$t1);
131 andi $tmp0,$inp,7 # $inp % 8
132 dsubu $inp,$inp,$tmp0 # align $inp
133 sll $tmp0,$tmp0,3 # byte to bit offset
136 beqz $tmp0,.Laligned_key
139 subu $tmp1,$zero,$tmp0
141 dsllv $in0,$in0,$tmp0
143 dsllv $in1,$in1,$tmp0
146 dsrlv $in0,$in0,$tmp0
148 dsrlv $in1,$in1,$tmp0
[all …]
/openbmc/linux/arch/x86/lib/
H A Dmemmove_32.S23 .set tmp0, %edx define
60 movl src, tmp0
61 xorl dest, tmp0
62 andl $0xff, tmp0
70 movl 0*4(src), tmp0
72 movl tmp0, 0*4(dest)
74 movl 2*4(src), tmp0
76 movl tmp0, 2*4(dest)
87 movl -4(src, n), tmp0
91 movl tmp0, (tmp1)
[all …]
/openbmc/linux/arch/x86/crypto/
H A Dsha512-avx-asm.S72 tmp0 = %rax define
125 mov e_64, tmp0 # tmp = e
127 RORQ tmp0, 23 # 41 # tmp = e ror 23
129 xor e_64, tmp0 # tmp = (e ror 23) ^ e
133 RORQ tmp0, 4 # 18 # tmp = ((e ror 23) ^ e) ror 4
134 xor e_64, tmp0 # tmp = (((e ror 23) ^ e) ror 4) ^ e
137 RORQ tmp0, 14 # 14 # tmp = ((((e ror23)^e)ror4)^e)ror14 = S1(e)
138 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)
139 mov a_64, tmp0 # tmp = a
141 and c_64, tmp0 # tmp = a & c
[all …]
H A Dsha512-ssse3-asm.S72 tmp0 = %rax define
119 mov e_64, tmp0 # tmp = e
121 ror $23, tmp0 # 41 # tmp = e ror 23
123 xor e_64, tmp0 # tmp = (e ror 23) ^ e
127 ror $4, tmp0 # 18 # tmp = ((e ror 23) ^ e) ror 4
128 xor e_64, tmp0 # tmp = (((e ror 23) ^ e) ror 4) ^ e
131 ror $14, tmp0 # 14 # tmp = ((((e ror23)^e)ror4)^e)ror14 = S1(e)
132 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)
133 mov a_64, tmp0 # tmp = a
135 and c_64, tmp0 # tmp = a & c
[all …]
H A Dsm4-aesni-avx2-asm_64.S76 #define transform_pre(x, lo_t, hi_t, mask4bit, tmp0) \ argument
77 vpand x, mask4bit, tmp0; \
81 vpshufb tmp0, lo_t, tmp0; \
83 vpxor tmp0, x, x;
87 #define transform_post(x, lo_t, hi_t, mask4bit, tmp0) \ argument
88 vpandn mask4bit, x, tmp0; \
92 vpshufb tmp0, lo_t, tmp0; \
94 vpxor tmp0, x, x;
H A Dsm4-aesni-avx-asm_64.S60 #define transform_pre(x, lo_t, hi_t, mask4bit, tmp0) \ argument
61 vpand x, mask4bit, tmp0; \
65 vpshufb tmp0, lo_t, tmp0; \
67 vpxor tmp0, x, x;
72 #define transform_post(x, lo_t, hi_t, mask4bit, tmp0) \ argument
73 vpandn mask4bit, x, tmp0; \
77 vpshufb tmp0, lo_t, tmp0; \
79 vpxor tmp0, x, x;
/openbmc/qemu/tests/tcg/aarch64/system/
H A Dmte.S13 #define tmp0 x2 /* Scratch register. */ macro
35 mrs tmp0, mair_el1
36 orr tmp0, tmp0, (0xF0 << 8)
37 msr mair_el1, tmp0
81 mov tmp0, 0xA5
82 msr gcr_el1, tmp0
/openbmc/linux/arch/loongarch/include/asm/
H A Dasmmacro.h58 .macro fpu_restore_csr thread tmp0 tmp1
59 ldptr.w \tmp0, \thread, THREAD_FCSR
60 movgr2fcsr fcsr0, \tmp0
63 andi \tmp0, \tmp0, FPU_CSR_TM
64 beqz \tmp0, 2f
66 ldptr.w \tmp0, \thread, THREAD_FTOP
67 andi \tmp0, \tmp0, 0x7
69 alsl.d \tmp1, \tmp0, \tmp1, 3
91 .macro fpu_save_cc thread tmp0 tmp1
92 movcf2gr \tmp0, $fcc0
[all …]
/openbmc/linux/arch/loongarch/kernel/
H A Dfpu.S98 .macro sc_save_fcc base, tmp0, tmp1
99 movcf2gr \tmp0, $fcc0
100 move \tmp1, \tmp0
101 movcf2gr \tmp0, $fcc1
102 bstrins.d \tmp1, \tmp0, 15, 8
103 movcf2gr \tmp0, $fcc2
104 bstrins.d \tmp1, \tmp0, 23, 16
105 movcf2gr \tmp0, $fcc3
106 bstrins.d \tmp1, \tmp0, 31, 24
107 movcf2gr \tmp0, $fcc4
[all …]
/openbmc/linux/arch/arm/include/asm/
H A Duaccess-asm.h86 .macro uaccess_entry, tsk, tmp0, tmp1, tmp2, disable
87 DACR( mrc p15, 0, \tmp0, c3, c0, 0)
88 DACR( str \tmp0, [sp, #SVC_DACR])
96 bic \tmp2, \tmp0, #domain_mask(DOMAIN_KERNEL)
104 .macro uaccess_exit, tsk, tmp0, tmp1
105 DACR( ldr \tmp0, [sp, #SVC_DACR])
106 DACR( mcr p15, 0, \tmp0, c3, c0, 0)
/openbmc/linux/drivers/video/fbdev/aty/
H A Dradeon_monitor.c169 unsigned long tmp, tmp0; in radeon_get_panel_info_BIOS() local
212 tmp0 = BIOS_IN16(tmp+64+i*2); in radeon_get_panel_info_BIOS()
213 if (tmp0 == 0) in radeon_get_panel_info_BIOS()
215 pr_debug(" %d x %d\n", BIOS_IN16(tmp0), BIOS_IN16(tmp0+2)); in radeon_get_panel_info_BIOS()
216 if ((BIOS_IN16(tmp0) == rinfo->panel_info.xres) && in radeon_get_panel_info_BIOS()
217 (BIOS_IN16(tmp0+2) == rinfo->panel_info.yres)) { in radeon_get_panel_info_BIOS()
218 rinfo->panel_info.hblank = (BIOS_IN16(tmp0+17) - BIOS_IN16(tmp0+19)) * 8; in radeon_get_panel_info_BIOS()
219 rinfo->panel_info.hOver_plus = ((BIOS_IN16(tmp0+21) - in radeon_get_panel_info_BIOS()
220 BIOS_IN16(tmp0+19) -1) * 8) & 0x7fff; in radeon_get_panel_info_BIOS()
221 rinfo->panel_info.hSync_width = BIOS_IN8(tmp0+23) * 8; in radeon_get_panel_info_BIOS()
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
H A Darith.fuc55 push $r3 // tmp0
68 mulu $r3 $r1 $r13 // tmp0 = A_hi * B_lo
70 and $r3 0xffff // tmp0 = tmp0_lo
77 mulu $r3 $r14 $r2 // tmp0 = A_lo * B_hi
79 and $r3 0xffff // tmp0 = tmp0_lo
86 mulu $r3 $r1 $r2 // tmp0 = A_hi * B_hi
/openbmc/qemu/target/rx/
H A Dop_helper.c202 uint8_t tmp0, tmp1; in helper_scmpu() local
207 tmp0 = cpu_ldub_data_ra(env, env->regs[1]++, GETPC()); in helper_scmpu()
210 if (tmp0 != tmp1 || tmp0 == '\0') { in helper_scmpu()
214 env->psw_z = tmp0 - tmp1; in helper_scmpu()
215 env->psw_c = (tmp0 >= tmp1); in helper_scmpu()
328 int64_t tmp0, tmp1; in helper_rmpa() local
340 tmp0 = cpu_ldfn[sz](env, env->regs[1], GETPC()); in helper_rmpa()
342 tmp0 *= tmp1; in helper_rmpa()
344 result_l += tmp0; in helper_rmpa()
346 if (tmp0 < 0) { in helper_rmpa()
H A Dtranslate.c1703 TCGv_i64 tmp0, tmp1; in rx_mul64hi() local
1704 tmp0 = tcg_temp_new_i64(); in rx_mul64hi()
1706 tcg_gen_ext_i32_i64(tmp0, cpu_regs[rs]); in rx_mul64hi()
1707 tcg_gen_sari_i64(tmp0, tmp0, 16); in rx_mul64hi()
1710 tcg_gen_mul_i64(ret, tmp0, tmp1); in rx_mul64hi()
1716 TCGv_i64 tmp0, tmp1; in rx_mul64lo() local
1717 tmp0 = tcg_temp_new_i64(); in rx_mul64lo()
1719 tcg_gen_ext_i32_i64(tmp0, cpu_regs[rs]); in rx_mul64lo()
1720 tcg_gen_ext16s_i64(tmp0, tmp0); in rx_mul64lo()
1723 tcg_gen_mul_i64(ret, tmp0, tmp1); in rx_mul64lo()
/openbmc/linux/arch/arm/crypto/
H A Dsha1-armv7-neon.S67 #define tmp0 q8 macro
156 vadd.u32 tmp0, W0, curK; \
162 vst1.32 {tmp0, tmp1}, [RWK]!; \
179 vadd.u32 tmp0, W0, curK; \
197 vst1.32 {tmp0, tmp1}, [RWK]!; \
209 veor tmp0, tmp0; \
214 vext.8 tmp0, W_m04, tmp0, #4; \
217 veor tmp0, tmp0, W_m16; \
222 veor W, W, tmp0; \
225 vshl.u32 tmp0, W, #1; \
[all …]
/openbmc/linux/tools/testing/selftests/bpf/prog_tests/
H A Dmmap.c24 void *bss_mmaped = NULL, *map_mmaped = NULL, *tmp0, *tmp1, *tmp2; in test_mmap() local
200 tmp0 = mmap(NULL, 4 * page_size, PROT_READ, MAP_SHARED | MAP_ANONYMOUS, in test_mmap()
202 if (CHECK(tmp0 == MAP_FAILED, "adv_mmap0", "errno %d\n", errno)) in test_mmap()
206 tmp1 = mmap(tmp0, 3 * page_size, PROT_READ, MAP_SHARED | MAP_FIXED, in test_mmap()
208 if (CHECK(tmp0 != tmp1, "adv_mmap1", "tmp0: %p, tmp1: %p\n", tmp0, tmp1)) { in test_mmap()
209 munmap(tmp0, 4 * page_size); in test_mmap()
/openbmc/linux/arch/arm64/crypto/
H A Daes-neon.S158 .macro mul_by_x_2x, out0, out1, in0, in1, tmp0, tmp1, const
159 sshr \tmp0\().16b, \in0\().16b, #7
162 and \tmp0\().16b, \tmp0\().16b, \const\().16b
165 eor \out0\().16b, \out0\().16b, \tmp0\().16b
169 .macro mul_by_x2_2x, out0, out1, in0, in1, tmp0, tmp1, const
170 ushr \tmp0\().16b, \in0\().16b, #6
173 pmul \tmp0\().16b, \tmp0\().16b, \const\().16b
176 eor \out0\().16b, \out0\().16b, \tmp0\().16b
/openbmc/u-boot/lib/
H A Daes.c514 u8 tmp0, tmp1, tmp2, tmp3, tmp4; in aes_expand_key() local
520 tmp0 = expkey[4*idx - 4]; in aes_expand_key()
526 tmp3 = sbox[tmp0]; in aes_expand_key()
527 tmp0 = sbox[tmp1] ^ rcon[idx / AES_KEYCOLS]; in aes_expand_key()
531 tmp0 = sbox[tmp0]; in aes_expand_key()
537 expkey[4*idx+0] = expkey[4*idx - 4*AES_KEYCOLS + 0] ^ tmp0; in aes_expand_key()
/openbmc/linux/arch/arm64/include/asm/
H A Dassembler.h370 .macro tcr_compute_pa_size, tcr, pos, tmp0, tmp1
371 mrs \tmp0, ID_AA64MMFR0_EL1
373 ubfx \tmp0, \tmp0, #ID_AA64MMFR0_EL1_PARANGE_SHIFT, #3
375 cmp \tmp0, \tmp1
376 csel \tmp0, \tmp1, \tmp0, hi
377 bfi \tcr, \tmp0, \pos, #3
/openbmc/linux/drivers/media/dvb-frontends/
H A Dcxd2820r_core.c52 u8 tmp0, tmp1; in cxd2820r_gpio() local
60 tmp0 = 0x00; in cxd2820r_gpio()
65 tmp0 |= (2 << 6) >> (2 * i); in cxd2820r_gpio()
67 tmp0 |= (1 << 6) >> (2 * i); in cxd2820r_gpio()
81 dev_dbg(&client->dev, "gpio i=%d %02x %02x\n", i, tmp0, tmp1); in cxd2820r_gpio()
84 dev_dbg(&client->dev, "wr gpio=%02x %02x\n", tmp0, tmp1); in cxd2820r_gpio()
87 ret = regmap_update_bits(priv->regmap[0], 0x0089, 0xfc, tmp0); in cxd2820r_gpio()
H A Dm88rs2000.c476 u8 tmp0, tmp1; in m88rs2000_read_ber() local
479 tmp0 = m88rs2000_readreg(state, 0xd8); in m88rs2000_read_ber()
480 if ((tmp0 & 0x10) != 0) { in m88rs2000_read_ber()
492 m88rs2000_writereg(state, 0xd8, (tmp0 & ~8) | 0x30); in m88rs2000_read_ber()
493 m88rs2000_writereg(state, 0xd8, (tmp0 & ~8) | 0x30); in m88rs2000_read_ber()
/openbmc/qemu/target/mips/tcg/
H A Dop_helper.c56 uint64_t tmp0 = ((uint64_t)rs) << 32 | ((uint64_t)rs & 0xffffffff); in helper_rotx() local
57 uint64_t tmp1 = tmp0; in helper_rotx()
70 if (tmp0 & (1LL << (i + 16))) { in helper_rotx()
/openbmc/qemu/target/i386/tcg/
H A Dtranslate.c137 TCGv tmp0; member
511 tcg_gen_addi_tl(s->tmp0, cpu_regs[reg], val); in gen_op_add_reg_im()
512 gen_op_mov_reg_v(s, size, reg, s->tmp0); in gen_op_add_reg_im()
517 tcg_gen_add_tl(s->tmp0, cpu_regs[reg], val); in gen_op_add_reg()
518 gen_op_mov_reg_v(s, size, reg, s->tmp0); in gen_op_add_reg()
1450 tcg_gen_deposit_tl(s->tmp0, s->T0, s->T1, 16, 16); in gen_shiftd_rm_T1()
1452 tcg_gen_mov_tl(s->T0, s->tmp0); in gen_shiftd_rm_T1()
1463 tcg_gen_subi_tl(s->tmp0, count, 1); in gen_shiftd_rm_T1()
1466 tcg_gen_shr_i64(s->tmp0, s->T0, s->tmp0); in gen_shiftd_rm_T1()
1470 tcg_gen_shl_i64(s->tmp0, s->T0, s->tmp0); in gen_shiftd_rm_T1()
[all …]
/openbmc/linux/drivers/rtc/
H A Drtc-m48t86.c199 unsigned char tmp0, tmp1; in m48t86_verify_chip() local
201 tmp0 = m48t86_readb(&pdev->dev, offset0); in m48t86_verify_chip()
210 m48t86_writeb(&pdev->dev, tmp0, offset0); in m48t86_verify_chip()
/openbmc/qemu/target/loongarch/tcg/
H A Dtlb_helper.c556 target_ulong phys, tmp0, ptindex, ptoffset0, ptoffset1, ps, badv; in helper_ldpte() local
593 tmp0 = base; in helper_ldpte()
595 tmp0 += MAKE_64BIT_MASK(ps, 1); in helper_ldpte()
609 tmp0 = ldq_phys(cs->as, phys) & TARGET_PHYS_MASK; in helper_ldpte()
614 env->CSR_TLBRELO1 = tmp0; in helper_ldpte()
616 env->CSR_TLBRELO0 = tmp0; in helper_ldpte()

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