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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-multimedia/libass/
H A Dlibass_0.17.3.bb17 # use larger tiles in the rasterizer (better performance, slightly worse quality)
18 PACKAGECONFIG[largetiles] = "--enable-large-tiles,--disable-large-tiles"
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-yuv-planar.rst102 - 64x32 tiles
111 - 16x16 tiles
125 - 4x4 tiles
146 - 4x4 tiles
312 pixels in 2D 16x16 tiles, and stores tiles linearly in memory.
317 pixels in 2D 64x32 tiles, and stores 2x2 groups of tiles in
321 If the vertical resolution is an odd number of tiles, the last row of
322 tiles is stored in linear order. The layouts of the luma and chroma
325 ``V4L2_PIX_FMT_NV12_4L4`` stores pixels in 4x4 tiles, and stores
326 tiles linearly in memory. The line stride and image height must be
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dnv25.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv25_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv25_fb_tile_comp()
H A Dnv35.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv35_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv35_fb_tile_comp()
H A Dnv36.c33 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv36_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv36_fb_tile_comp()
H A Dnv40.c33 u32 tiles = DIV_ROUND_UP(size, 0x80); in nv40_fb_tile_comp() local
34 u32 tags = round_up(tiles / fb->ram->parts, 0x100); in nv40_fb_tile_comp()
H A Dnv20.c46 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv20_fb_tile_comp() local
47 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv20_fb_tile_comp()
H A Dnv30.c52 u32 tiles = DIV_ROUND_UP(size, 0x40); in nv30_fb_tile_comp() local
53 u32 tags = round_up(tiles / fb->ram->parts, 0x40); in nv30_fb_tile_comp()
/openbmc/linux/Documentation/admin-guide/perf/
H A Dthunderx2-pmu.rst9 The DMC has 8 interleaved channels and the L3C has 16 interleaved tiles.
11 to the total number of channels/tiles.
/openbmc/linux/drivers/media/platform/mediatek/vcodec/decoder/vdec/
H A Dvdec_vp9_req_lat_if.c276 struct vdec_vp9_slice_tiles tiles; member
888 struct vdec_vp9_slice_tiles *tiles; in vdec_vp9_slice_setup_tile() local
898 tiles = &vsi->frame.tiles; in vdec_vp9_slice_setup_tile()
899 tiles->actual_rows = 0; in vdec_vp9_slice_setup_tile()
912 tiles->mi_rows[i] = (offset + 7) >> 3; in vdec_vp9_slice_setup_tile()
913 if (tiles->mi_rows[i]) in vdec_vp9_slice_setup_tile()
914 tiles->actual_rows++; in vdec_vp9_slice_setup_tile()
921 tiles->mi_cols[i] = (offset + 7) >> 3; in vdec_vp9_slice_setup_tile()
1080 struct vdec_vp9_slice_tiles *tiles; in vdec_vp9_slice_setup_tile_buffer() local
1106 tiles = &vsi->frame.tiles; in vdec_vp9_slice_setup_tile_buffer()
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/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_fb.c918 unsigned int tiles; in intel_adjust_tile_offset() local
924 tiles = (old_offset - new_offset) / tile_size; in intel_adjust_tile_offset()
926 *y += tiles / pitch_tiles * tile_height; in intel_adjust_tile_offset()
927 *x += tiles % pitch_tiles * tile_width; in intel_adjust_tile_offset()
1029 unsigned int tile_rows, tiles, pitch_tiles; in intel_compute_aligned_offset() local
1044 tiles = *x / tile_width; in intel_compute_aligned_offset()
1047 offset = (tile_rows * pitch_tiles + tiles) * tile_size; in intel_compute_aligned_offset()
1556 unsigned int tiles; in calc_plane_normal_size() local
1559 tiles = plane_view_linear_tiles(fb, color_plane, dims, x, y); in calc_plane_normal_size()
1561 tiles = plane_view_src_stride_tiles(fb, color_plane, dims) * in calc_plane_normal_size()
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/openbmc/linux/arch/arm/include/debug/
H A Dvexpress.S28 @ - all other (RS1 complaint) tiles use UART mapped
/openbmc/linux/drivers/video/fbdev/core/
H A DKconfig200 where the screen is divided into rectangular sections (tiles), whereas
203 parameters in terms of number of tiles instead of number of pixels.
207 terms of number of tiles in the x- and y-axis.
/openbmc/linux/drivers/pinctrl/qcom/
H A Dpinctrl-msm.h155 const char *const *tiles; member
H A Dpinctrl-msm.c1502 if (soc_data->tiles) { in msm_pinctrl_probe()
1505 soc_data->tiles[i]); in msm_pinctrl_probe()
H A Dpinctrl-sc8180x.c1592 .tiles = sc8180x_tiles,
1606 .tiles = sc8180x_tiles,
H A Dpinctrl-sm6115.c878 .tiles = sm6115_tiles,
H A Dpinctrl-sm7150.c1233 .tiles = sm7150_tiles,
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-driver-hid-picolcd41 tiles get changed and it's not appropriate to expect the application
/openbmc/linux/arch/arm/boot/dts/arm/
H A Darm-realview-eb.dts42 * core tiles.
/openbmc/linux/drivers/media/platform/verisilicon/
H A Dhantro_g2_vp9_dec.c254 static void recompute_tile_info(unsigned short *tile_info, unsigned int tiles, unsigned int sbs) in recompute_tile_info() argument
260 for (i = 1; i <= tiles; ++i) { in recompute_tile_info()
261 next_accumulated = i * sbs / tiles; in recompute_tile_info()
/openbmc/linux/arch/arm/
H A DKconfig.debug1284 bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
1291 Note that this will only work with standard A-class core tiles,
1303 bool "Use PL011 UART0 at 0x1c090000 (RS1 complaint tiles)"
1308 of the tiles using the RS1 memory map, including all new A-class
1309 core tiles, FPGA-based SMMs and software models.
1312 bool "Use PL011 UART0 at 0xb0090000 (Cortex-R compliant tiles)"
1317 Cortex-R series tiles and SMMs, such as Cortex-R5 and Cortex-R7
/openbmc/linux/Documentation/translations/sp_SP/process/
H A Dkernel-docs.rst32 útiles para buscar temas específicos, y una breve "Descripción" del
H A Dsubmitting-patches.rst713 útiles para personas que podrían estar buscando en los registros de
773 útiles. Por ejemplo, las tempranas cadenas de llamadas de inicio son únicas
778 Por lo tanto, los backtraces más útiles deben contener los datos
/openbmc/linux/arch/arm/mach-versatile/
H A DKconfig270 ARM core and logic (FPGA) tiles on the Versatile Express motherboard,

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