Home
last modified time | relevance | path

Searched refs:tcg_gen_setcondi_tl (Results 1 – 14 of 14) sorted by relevance

/openbmc/qemu/target/mips/tcg/
H A Docteon_translate.c171 tcg_gen_setcondi_tl(TCG_COND_NE, cpu_gpr[a->rt], t0, imm); in trans_SEQNEI()
173 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_gpr[a->rt], t0, imm); in trans_SEQNEI()
H A Dtranslate.c2453 tcg_gen_setcondi_tl(TCG_COND_LT, cpu_gpr[rt], t0, uimm); in gen_slt_imm()
2456 tcg_gen_setcondi_tl(TCG_COND_LTU, cpu_gpr[rt], t0, uimm); in gen_slt_imm()
3031 tcg_gen_setcondi_tl(TCG_COND_EQ, t2, t0, INT_MIN); in gen_r6_muldiv()
3032 tcg_gen_setcondi_tl(TCG_COND_EQ, t3, t1, -1); in gen_r6_muldiv()
3034 tcg_gen_setcondi_tl(TCG_COND_EQ, t3, t1, 0); in gen_r6_muldiv()
3047 tcg_gen_setcondi_tl(TCG_COND_EQ, t2, t0, INT_MIN); in gen_r6_muldiv()
3048 tcg_gen_setcondi_tl(TCG_COND_EQ, t3, t1, -1); in gen_r6_muldiv()
3050 tcg_gen_setcondi_tl(TCG_COND_EQ, t3, t1, 0); in gen_r6_muldiv()
3122 tcg_gen_setcondi_tl(TCG_COND_EQ, t2, t0, -1LL << 63); in gen_r6_muldiv()
3123 tcg_gen_setcondi_tl(TCG_COND_EQ, t3, t1, -1LL); in gen_r6_muldiv()
[all …]
H A Dnanomips_translate.c.inc1204 tcg_gen_setcondi_tl(TCG_COND_GE, bcond, t0, 0);
1209 tcg_gen_setcondi_tl(TCG_COND_GE, bcond, t0, 32);
1370 tcg_gen_setcondi_tl(TCG_COND_LT, t0, t1, 0);
3789 tcg_gen_setcondi_tl(TCG_COND_EQ, t0, t0, imm);
/openbmc/qemu/target/avr/
H A Dtranslate.c282 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_Zf, R, 0); /* Zf = R == 0 */ in gen_ZNSf()
364 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_Zf, R, 0); /* Zf = R == 0 */ in trans_ADIW()
511 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_Zf, R, 0); /* Zf = R == 0 */ in trans_SBIW()
535 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_Zf, R, 0); /* Zf = R == 0 */ in trans_AND()
675 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_Vf, Rd, 0x80); /* Vf = Rd == 0x80 */ in trans_INC()
697 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_Vf, Rd, 0x7f); /* Vf = Rd == 0x7f */ in trans_DEC()
724 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_Zf, R, 0); /* Zf = R == 0 */ in trans_MUL()
754 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_Zf, R, 0); /* Zf = R == 0 */ in trans_MULS()
783 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_Zf, R, 0); /* Zf = R == 0 */ in trans_MULSU()
807 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_Zf, R, 0); /* Zf = R == 0 */ in trans_FMUL()
[all …]
/openbmc/qemu/target/openrisc/
H A Dtranslate.c262 tcg_gen_setcondi_tl(TCG_COND_NE, cpu_sr_cy, cpu_sr_cy, 0); in gen_mulu()
271 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_sr_ov, srcb, 0); in gen_div()
285 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_sr_cy, srcb, 0); in gen_divu()
1009 tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_sr_f, cpu_R(dc, a->a), a->i); in trans_l_sfeqi()
1015 tcg_gen_setcondi_tl(TCG_COND_NE, cpu_sr_f, cpu_R(dc, a->a), a->i); in trans_l_sfnei()
1021 tcg_gen_setcondi_tl(TCG_COND_GTU, cpu_sr_f, cpu_R(dc, a->a), a->i); in trans_l_sfgtui()
1027 tcg_gen_setcondi_tl(TCG_COND_GEU, cpu_sr_f, cpu_R(dc, a->a), a->i); in trans_l_sfgeui()
1033 tcg_gen_setcondi_tl(TCG_COND_LTU, cpu_sr_f, cpu_R(dc, a->a), a->i); in trans_l_sfltui()
1039 tcg_gen_setcondi_tl(TCG_COND_LEU, cpu_sr_f, cpu_R(dc, a->a), a->i); in trans_l_sfleui()
1045 tcg_gen_setcondi_tl(TCG_COND_GT, cpu_sr_f, cpu_R(dc, a->a), a->i); in trans_l_sfgtsi()
[all …]
/openbmc/qemu/target/hexagon/
H A Dgen_tcg.h963 fGEN_TCG_cond_jumpt(tcg_gen_setcondi_tl(TCG_COND_NE, LSB, RsV, 0))
965 fGEN_TCG_cond_jumpt(tcg_gen_setcondi_tl(TCG_COND_NE, LSB, RsV, 0))
967 fGEN_TCG_cond_jumpt(tcg_gen_setcondi_tl(TCG_COND_EQ, LSB, RsV, 0))
969 fGEN_TCG_cond_jumpt(tcg_gen_setcondi_tl(TCG_COND_EQ, LSB, RsV, 0))
971 fGEN_TCG_cond_jumpt(tcg_gen_setcondi_tl(TCG_COND_GE, LSB, RsV, 0))
973 fGEN_TCG_cond_jumpt(tcg_gen_setcondi_tl(TCG_COND_GE, LSB, RsV, 0))
975 fGEN_TCG_cond_jumpt(tcg_gen_setcondi_tl(TCG_COND_LE, LSB, RsV, 0))
977 fGEN_TCG_cond_jumpt(tcg_gen_setcondi_tl(TCG_COND_LE, LSB, RsV, 0))
H A Dgenptr.c987 tcg_gen_setcondi_tl(cond, pred, val, src); in gen_cmpi_jumpnv()
/openbmc/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_arith.c.inc124 tcg_gen_setcondi_tl(TCG_COND_EQ, ret, src1, INT64_MIN);
125 tcg_gen_setcondi_tl(TCG_COND_EQ, t0, src2, -1);
126 tcg_gen_setcondi_tl(TCG_COND_EQ, t1, src2, 0);
/openbmc/qemu/target/tricore/
H A Dtranslate.c1015 tcg_gen_setcondi_tl(TCG_COND_EQ, temp, arg2, 0x80000000); in gen_madd32_q()
1044 tcg_gen_setcondi_tl(TCG_COND_EQ, temp2, temp, 0x80000000); in gen_m16add32_q()
1061 tcg_gen_setcondi_tl(TCG_COND_EQ, temp2, temp, 0x80000000); in gen_m16adds32_q()
1083 tcg_gen_setcondi_tl(TCG_COND_EQ, temp2, temp, 0x80000000); in gen_m16add64_q()
1109 tcg_gen_setcondi_tl(TCG_COND_EQ, temp2, temp, 0x80000000); in gen_m16adds64_q()
1150 tcg_gen_setcondi_tl(TCG_COND_EQ, temp, arg2, 0x80000000); in gen_madd64_q()
1352 tcg_gen_setcondi_tl(TCG_COND_NE, carry, cpu_PSW_C, 0); in gen_addc_CC()
1777 tcg_gen_setcondi_tl(TCG_COND_EQ, temp2, temp, 0x80000000); in gen_m16sub32_q()
1794 tcg_gen_setcondi_tl(TCG_COND_EQ, temp2, temp, 0x80000000); in gen_m16subs32_q()
1816 tcg_gen_setcondi_tl(TCG_COND_EQ, temp2, temp, 0x80000000); in gen_m16sub64_q()
[all …]
/openbmc/qemu/include/tcg/
H A Dtcg-op.h200 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i64 macro
320 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvi.c.inc212 tcg_gen_setcondi_tl(cond, rl, rl, 0);
/openbmc/qemu/target/sparc/
H A Dtranslate.c2636 tcg_gen_setcondi_tl(cmp->cond, cpu_cond, cmp->c1, cmp->c2); in advance_jump_cond()
3907 tcg_gen_setcondi_tl(TCG_COND_EQ, t1, src1, (target_long)INT64_MIN); in trans_SDIVX()
3908 tcg_gen_setcondi_tl(TCG_COND_EQ, t2, src2, -1); in trans_SDIVX()
/openbmc/qemu/target/ppc/
H A Dtranslate.c2329 tcg_gen_setcondi_tl(TCG_COND_NE, cpu_ca, cpu_ca, 0); in gen_srawi()
2410 tcg_gen_setcondi_tl(TCG_COND_NE, cpu_ca, cpu_ca, 0); in gen_sradi()
3283 tcg_gen_setcondi_tl(TCG_COND_EQ, t0, t0, 0); in gen_stqcx_()
/openbmc/qemu/target/i386/tcg/
H A Dtranslate.c1166 tcg_gen_setcondi_tl(cc.cond, reg, cc.reg, cc.imm); in gen_setcc1()