Home
last modified time | relevance | path

Searched refs:tcg_gen_sari_tl (Results 1 – 14 of 14) sorted by relevance

/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvm.c.inc80 tcg_gen_sari_tl(t0h, rs1h, 63);
83 tcg_gen_sari_tl(t1h, rs2h, 63);
100 tcg_gen_sari_tl(ret, ret, 32);
118 tcg_gen_sari_tl(t0h, rs1h, 63);
131 tcg_gen_sari_tl(rl, arg1, TARGET_LONG_BITS - 1);
144 tcg_gen_sari_tl(ret, ret, 32);
H A Dtrans_rvzacas.c.inc59 tcg_gen_sari_tl(cpu_gprh[reg_num], cpu_gpr[reg_num], 63);
60 tcg_gen_sari_tl(cpu_gprh[reg_num + 1], cpu_gpr[reg_num + 1], 63);
H A Dtrans_rvi.c.inc307 tcg_gen_sari_tl(desth, destl, 63);
598 tcg_gen_sari_tl(retl, src1h, shamt - 64);
599 tcg_gen_sari_tl(reth, src1h, 63);
602 tcg_gen_sari_tl(reth, src1h, shamt);
609 tcg_gen_sari_tl, gen_sraiw, gen_srai_i128);
718 tcg_gen_sari_tl(lr, src1h, 63);
790 return gen_shift_imm_fn(ctx, a, EXT_NONE, tcg_gen_sari_tl, NULL);
/openbmc/qemu/target/tricore/
H A Dtranslate.c140 tcg_gen_sari_tl(arg00, arg0, 16); \
151 tcg_gen_sari_tl(arg00, arg0, 16); \
153 tcg_gen_sari_tl(arg11, arg1, 16); \
163 tcg_gen_sari_tl(arg00, arg0, 16); \
165 tcg_gen_sari_tl(arg10, arg1, 16); \
174 tcg_gen_sari_tl(arg01, arg0, 16); \
176 tcg_gen_sari_tl(arg11, arg1, 16); \
2176 tcg_gen_sari_tl(low, low, 31); in gen_mul_i32s()
2505 tcg_gen_sari_tl(ret, r1, 31); in gen_shaci()
2532 tcg_gen_sari_tl(ret, r1, -shift_count); in gen_shaci()
[all …]
/openbmc/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_shift.c.inc88 TRANS(srai_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_sari_tl)
/openbmc/qemu/include/tcg/
H A Dtcg-op.h196 #define tcg_gen_sari_tl tcg_gen_sari_i64 macro
316 #define tcg_gen_sari_tl tcg_gen_sari_i32
/openbmc/qemu/target/mips/tcg/
H A Dmxu_translate.c1870 tcg_gen_sari_tl(t0, t0, sft4); in gen_mxu_d32sxx()
1871 tcg_gen_sari_tl(t1, t1, sft4); in gen_mxu_d32sxx()
2013 tcg_gen_sari_tl(t0, t0, sft4); in gen_mxu_q16sxx()
2014 tcg_gen_sari_tl(t1, t1, sft4); in gen_mxu_q16sxx()
2015 tcg_gen_sari_tl(t2, t2, sft4); in gen_mxu_q16sxx()
2016 tcg_gen_sari_tl(t3, t3, sft4); in gen_mxu_q16sxx()
3832 tcg_gen_sari_tl(t0, mxu_gpr[XRb - 1], 16); in gen_mxu_Q16SAT()
3844 tcg_gen_sari_tl(t1, t1, 16); in gen_mxu_Q16SAT()
3868 tcg_gen_sari_tl(t0, mxu_gpr[XRc - 1], 16); in gen_mxu_Q16SAT()
3880 tcg_gen_sari_tl(t1, t1, 16); in gen_mxu_Q16SAT()
H A Dtranslate.c2481 tcg_gen_sari_tl(cpu_gpr[rt], t0, uimm); in gen_shift_imm()
2507 tcg_gen_sari_tl(cpu_gpr[rt], t0, uimm); in gen_shift_imm()
2523 tcg_gen_sari_tl(cpu_gpr[rt], t0, uimm + 32); in gen_shift_imm()
/openbmc/qemu/target/ppc/
H A Dtranslate.c2285 tcg_gen_sari_tl(t0, t0, 0x3f); in gen_slw()
2288 tcg_gen_sari_tl(t0, t0, 0x1f); in gen_slw()
2327 tcg_gen_sari_tl(t0, dst, TARGET_LONG_BITS - 1); in gen_srawi()
2333 tcg_gen_sari_tl(dst, dst, sh); in gen_srawi()
2349 tcg_gen_sari_tl(t0, t0, 0x3f); in gen_srw()
2352 tcg_gen_sari_tl(t0, t0, 0x1f); in gen_srw()
2373 tcg_gen_sari_tl(t0, t0, 0x3f); in gen_sld()
2408 tcg_gen_sari_tl(t0, src, TARGET_LONG_BITS - 1); in gen_sradi()
2414 tcg_gen_sari_tl(dst, src, sh); in gen_sradi()
2463 tcg_gen_sari_tl(t0, t0, 0x3f); in gen_srd()
[all …]
/openbmc/qemu/target/openrisc/
H A Dtranslate.c253 tcg_gen_sari_tl(t0, dest, TARGET_LONG_BITS - 1); in gen_mul()
909 tcg_gen_sari_tl(cpu_R(dc, a->d), cpu_R(dc, a->a), in trans_l_srai()
/openbmc/qemu/target/hexagon/
H A Dmacros.h333 tcg_gen_sari_tl(msb, val, 21); in gen_read_ireg()
/openbmc/qemu/target/riscv/
H A Dtranslate.c405 tcg_gen_sari_tl(cpu_gprh[reg_num], cpu_gpr[reg_num], 63); in gen_set_gpr()
/openbmc/qemu/target/sparc/
H A Dtranslate.c4146 tcg_gen_sari_tl(dst, src1, a->i); in TRANS()
/openbmc/qemu/target/i386/tcg/
H A Demit.c.inc2108 tcg_gen_sari_tl(s->T1, s->T0, TARGET_LONG_BITS - 1);