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Searched refs:tcg_gen_ext32u_tl (Results 1 – 17 of 17) sorted by relevance

/openbmc/qemu/target/mips/tcg/
H A Dloong_translate.c102 tcg_gen_ext32u_tl(t0, t0); in gen_lext_DIVU_G()
103 tcg_gen_ext32u_tl(t1, t1); in gen_lext_DIVU_G()
150 tcg_gen_ext32u_tl(t0, t0); in gen_lext_MOD_G()
151 tcg_gen_ext32u_tl(t1, t1); in gen_lext_MOD_G()
199 tcg_gen_ext32u_tl(t0, t0); in gen_lext_MODU_G()
200 tcg_gen_ext32u_tl(t1, t1); in gen_lext_MODU_G()
H A Dtranslate.c2485 tcg_gen_ext32u_tl(t0, t0); in gen_shift_imm()
2836 tcg_gen_ext32u_tl(t1, t1); in gen_shift()
3059 tcg_gen_ext32u_tl(t0, t0); in gen_r6_muldiv()
3060 tcg_gen_ext32u_tl(t1, t1); in gen_r6_muldiv()
3069 tcg_gen_ext32u_tl(t0, t0); in gen_r6_muldiv()
3070 tcg_gen_ext32u_tl(t1, t1); in gen_r6_muldiv()
3218 tcg_gen_ext32u_tl(t0, t0); in gen_div1_tx79()
3219 tcg_gen_ext32u_tl(t1, t1); in gen_div1_tx79()
3273 tcg_gen_ext32u_tl(t0, t0); in gen_muldiv()
3274 tcg_gen_ext32u_tl(t1, t1); in gen_muldiv()
[all …]
H A Dnanomips_translate.c.inc1798 tcg_gen_ext32u_tl(t0, t0);
1867 tcg_gen_ext32u_tl(t0, t0);
1868 tcg_gen_ext32u_tl(t1, t1);
1969 tcg_gen_ext32u_tl(t0, t0);
1970 tcg_gen_ext32u_tl(t1, t1);
H A Dmips16e_translate.c.inc1028 tcg_gen_ext32u_tl(cpu_gpr[rx], cpu_gpr[rx]);
/openbmc/qemu/target/loongarch/tcg/
H A Dtranslate.c188 tcg_gen_ext32u_tl(t, cpu_gpr[reg_num]); in gpr_src()
213 tcg_gen_ext32u_tl(cpu_gpr[reg_num], t); in gen_set_gpr()
247 tcg_gen_ext32u_tl(temp, base); in make_address_x()
/openbmc/qemu/include/tcg/
H A Dtcg-op.h220 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64 macro
340 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
/openbmc/qemu/target/ppc/
H A Dtranslate.c453 tcg_gen_ext32u_tl(t0, cpu_gpr[gprn]); in spr_write_generic32()
491 tcg_gen_ext32u_tl(t0, cpu_gpr[gprn]); in spr_core_write_generic32()
1219 tcg_gen_ext32u_tl(val, cpu_gpr[gprn]); in spr_write_mas73()
1265 tcg_gen_ext32u_tl(cpu_gpr[gprn], spr_up); in spr_read_prev_upper32()
1404 tcg_gen_ext32u_tl(cpu_gpr[gprn], t0); in spr_read_dexcr_ureg()
1619 tcg_gen_ext32u_tl(t0, arg0); in gen_op_cmp32()
1620 tcg_gen_ext32u_tl(t1, arg1); in gen_op_cmp32()
2294 tcg_gen_ext32u_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); in gen_slw()
2355 tcg_gen_ext32u_tl(t0, t0); in gen_srw()
2490 tcg_gen_ext32u_tl(EA, EA); in gen_addr_imm_index()
[all …]
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvb.c.inc426 tcg_gen_ext32u_tl(t, arg1); \
452 tcg_gen_ext32u_tl(t, arg1);
H A Dtrans_rvzce.c.inc66 return gen_unary(ctx, a, EXT_NONE, tcg_gen_ext32u_tl);
H A Dtrans_rvm.c.inc142 tcg_gen_ext32u_tl(t2, arg2);
/openbmc/qemu/target/riscv/
H A Dtranslate.c349 tcg_gen_ext32u_tl(t, cpu_gpr[reg_num]); in get_gpr()
597 tcg_gen_ext32u_tl(addr, addr); in get_address()
616 tcg_gen_ext32u_tl(addr, addr); in get_address_indexed()
/openbmc/qemu/target/ppc/translate/
H A Dstorage-ctrl-impl.c.inc213 tcg_gen_ext32u_tl(t0, cpu_gpr[rb]);
H A Dspe-impl.c.inc606 tcg_gen_ext32u_tl(EA, EA);
/openbmc/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_bit.c.inc70 tcg_gen_ext32u_tl(dest, dest);
/openbmc/qemu/target/sparc/
H A Dtranslate.c440 tcg_gen_ext32u_tl(t, t); in gen_op_taddcc()
505 tcg_gen_ext32u_tl(t, t); in gen_op_tsubcc()
539 tcg_gen_ext32u_tl(t_src1, src1); in gen_op_mulscc()
540 tcg_gen_ext32u_tl(t_src2, src2); in gen_op_mulscc()
656 tcg_gen_ext32u_tl(cpu_cc_N, t64); in gen_op_udivcc()
1138 tcg_gen_ext32u_tl(t1, cpu_icc_Z); in gen_compare()
1154 tcg_gen_ext32u_tl(t1, t1); in gen_compare()
1182 tcg_gen_ext32u_tl(t1, t1); in gen_compare()
3270 tcg_gen_ext32u_tl(cpu_y, src); in do_wry()
4105 tcg_gen_ext32u_tl(dst, dst); in do_shift_r()
[all …]
/openbmc/qemu/target/i386/tcg/
H A Dtranslate.c465 tcg_gen_ext32u_tl(dest, t0); in gen_op_deposit_reg_v()
498 tcg_gen_ext32u_tl(s->A0, s->A0); in gen_add_A0_im()
640 tcg_gen_ext32u_tl(dest, a0); in gen_lea_v_seg_dest()
666 tcg_gen_ext32u_tl(dest, a0); in gen_lea_v_seg_dest()
670 tcg_gen_ext32u_tl(dest, dest); in gen_lea_v_seg_dest()
3210 tcg_gen_ext32u_tl(s->A0, cpu_regs[R_EAX]); in gen_multi0F()
3450 tcg_gen_ext32u_tl(s->A0, s->A0); in gen_multi0F()
H A Demit.c.inc1235 tcg_gen_ext32u_tl(s->T0, s->T0);
1236 tcg_gen_ext32u_tl(s->T1, s->T1);
2152 tcg_gen_ext32u_tl(cpu_regs[R_EAX], s->T0);
2643 tcg_gen_ext32u_tl(s->T1, s->T1);
2645 tcg_gen_ext32u_tl(cpu_regs[R_EAX], s->T0);