/openbmc/qemu/target/avr/ |
H A D | translate.c | 219 tcg_gen_andc_tl(t2, Rd, R); /* t2 = Rd & ~R */ in gen_add_CHf() 220 tcg_gen_andc_tl(t3, Rr, R); /* t3 = Rr & ~R */ in gen_add_CHf() 238 tcg_gen_andc_tl(t1, t1, t2); in gen_add_Vf() 360 tcg_gen_andc_tl(cpu_Cf, Rd, R); /* Cf = Rd & ~R */ in trans_ADIW() 362 tcg_gen_andc_tl(cpu_Vf, R, Rd); /* Vf = R & ~Rd */ in trans_ADIW() 388 tcg_gen_andc_tl(cpu_Cf, Rd, R); /* Cf = Rd & ~R */ in trans_SUB() 507 tcg_gen_andc_tl(cpu_Cf, R, Rd); in trans_SBIW() 509 tcg_gen_andc_tl(cpu_Vf, Rd, R); in trans_SBIW() 2269 tcg_gen_andc_tl(t1, t0, Rr); /* t1 = t0 & (0xff - Rr) = t0 & ~Rr */ in trans_LAC()
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/openbmc/qemu/target/mips/tcg/ |
H A D | octeon_translate.c | 35 tcg_gen_andc_tl(bcond, p, t0); in trans_BBIT()
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H A D | translate.c | 1995 tcg_gen_andc_tl(t1, reg, t1); in gen_lxl() 2562 tcg_gen_andc_tl(t1, t2, t1); in gen_arith() 2632 tcg_gen_andc_tl(t1, t2, t1); in gen_arith() 11160 tcg_gen_andc_tl(t2, t3, t2); in gen_compute_compact_branch()
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H A D | nanomips_translate.c.inc | 1367 tcg_gen_andc_tl(t1, t2, t1);
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/openbmc/qemu/include/tcg/ |
H A D | tcg-op.h | 231 #define tcg_gen_andc_tl tcg_gen_andc_i64 macro 349 #define tcg_gen_andc_tl tcg_gen_andc_i32
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/openbmc/qemu/target/riscv/insn_trans/ |
H A D | trans_rvb.c.inc | 100 return gen_logic(ctx, a, tcg_gen_andc_tl); 182 tcg_gen_andc_tl(ret, arg1, t); 323 tcg_gen_andc_tl(tmp, tmp, low7);
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/openbmc/qemu/target/tricore/ |
H A D | translate.c | 288 tcg_gen_andc_tl(temp, temp, cpu_gpr_d[ereg+1]); in gen_ldmst() 329 tcg_gen_andc_tl(temp3, temp, cpu_gpr_d[reg+1]); in gen_swapmsk() 404 tcg_gen_andc_tl(cpu_PSW_V, cpu_PSW_V, t0); in gen_add_d() 457 tcg_gen_andc_tl(temp2, temp2, temp3); in gen_addsub64_h() 467 tcg_gen_andc_tl(cpu_PSW_V, cpu_PSW_V, temp4); in gen_addsub64_h() 541 tcg_gen_andc_tl(cpu_PSW_V, cpu_PSW_V, t1); in gen_madd64_d() 1327 tcg_gen_andc_tl(cpu_PSW_V, cpu_PSW_V, t0); in gen_add_CC() 1359 tcg_gen_andc_tl(cpu_PSW_V, cpu_PSW_V, t0); in gen_addc_CC() 1394 tcg_gen_andc_tl(temp, temp, temp2); in gen_cond_add() 2741 tcg_gen_andc_tl(temp2, r1, mask); in gen_insert() [all …]
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/openbmc/qemu/target/riscv/ |
H A D | translate.c | 595 tcg_gen_andc_tl(addr, addr, pm_mask); in get_address() 614 tcg_gen_andc_tl(addr, addr, pm_mask); in get_address_indexed()
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/openbmc/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_privileged.c.inc | 277 tcg_gen_andc_tl(temp, oldv, mask);
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H A D | trans_arith.c.inc | 271 TRANS(andn, ALL, gen_rrr, EXT_NONE, EXT_NONE, EXT_NONE, tcg_gen_andc_tl)
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/openbmc/qemu/target/ppc/ |
H A D | translate.c | 1093 tcg_gen_andc_tl(t0, t0, t1); in spr_write_amr() 1120 tcg_gen_andc_tl(t0, t0, t1); in spr_write_uamor() 1147 tcg_gen_andc_tl(t0, t0, t1); in spr_write_iamr() 1652 tcg_gen_andc_tl(cpu_ov, cpu_ov, t0); in gen_op_arith_compute_ov() 2290 tcg_gen_andc_tl(t0, cpu_gpr[rS(ctx->opcode)], t0); in gen_slw() 2354 tcg_gen_andc_tl(t0, cpu_gpr[rS(ctx->opcode)], t0); in gen_srw() 2374 tcg_gen_andc_tl(t0, cpu_gpr[rS(ctx->opcode)], t0); in gen_sld() 2464 tcg_gen_andc_tl(t0, cpu_gpr[rS(ctx->opcode)], t0); in gen_srd()
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/openbmc/qemu/target/openrisc/ |
H A D | translate.c | 210 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_add() 226 tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov); in gen_addc()
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/openbmc/qemu/target/ppc/translate/ |
H A D | fixedpoint-impl.c.inc | 1234 TRANS(ANDC, do_logical2, tcg_gen_andc_tl); 1276 tcg_gen_andc_tl(carryl, tcg_constant_tl(carry_bits), carryl);
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H A D | spe-impl.c.inc | 72 GEN_SPEOP_LOGIC2(evandc, tcg_gen_andc_tl);
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/openbmc/qemu/target/i386/tcg/ |
H A D | emit.c.inc | 1290 tcg_gen_andc_tl(s->T0, s->T1, s->T0); 1338 tcg_gen_andc_tl(s->T0, s->T0, s->T1); 1509 tcg_gen_andc_tl(s->T0, s->T0, mask); 1542 tcg_gen_andc_tl(s->T0, s->T0, s->A0);
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/openbmc/qemu/target/sparc/ |
H A D | translate.c | 410 tcg_gen_andc_tl(cpu_cc_V, cpu_cc_V, cpu_cc_Z); in gen_op_addcc_int() 1152 tcg_gen_andc_tl(t1, xcc ? cpu_cc_Z : cpu_icc_Z, t1); in gen_compare() 3740 TRANS(ANDN, ALL, do_logic, a, tcg_gen_andc_tl, NULL) in TRANS()
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