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Searched refs:tb_sw_dbg (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/thunderbolt/
H A Dquirks.c13 tb_sw_dbg(sw, "forcing power to link controller\n"); in quirk_force_power_link()
20 tb_sw_dbg(sw, "quirked DP main: %u\n", sw->min_dp_main_credits); in quirk_dp_credit_allocation()
27 tb_sw_dbg(sw, "disabling CL states\n"); in quirk_clx_disable()
49 tb_sw_dbg(sw, "preventing runtime PM in DP redrive mode\n"); in quirk_block_rpm_in_redrive()
134 tb_sw_dbg(sw, "running %ps\n", q->hook); in tb_check_quirks()
H A Dtmu.c364 tb_sw_dbg(sw, "TMU: supports uni-directional mode\n"); in tmu_mode_init()
367 tb_sw_dbg(sw, "TMU: supports enhanced uni-directional mode\n"); in tmu_mode_init()
433 tb_sw_dbg(sw, "TMU: current mode: %s\n", tmu_mode_name(sw->tmu.mode)); in tb_switch_tmu_init()
469 tb_sw_dbg(root_switch, "TMU: local_time[%d]=0x%08x\n", i, in tb_switch_tmu_post_time()
529 tb_sw_dbg(sw, "TMU: updated local time to %#llx\n", local_time); in tb_switch_tmu_post_time()
616 tb_sw_dbg(sw, "TMU: disabled\n"); in tb_switch_tmu_disable()
1006 tb_sw_dbg(sw, "TMU: mode set to: %s\n", tmu_mode_name(sw->tmu.mode)); in tb_switch_tmu_enable()
1056 tb_sw_dbg(sw, "TMU: mode change %s -> %s requested\n", in tb_switch_tmu_configure()
H A Dclx.c209 tb_sw_dbg(sw, "CLx: current mode: %s\n", clx_name(clx)); in tb_switch_clx_init()
382 tb_sw_dbg(sw, "CLx: %s enabled\n", clx_name(clx)); in tb_switch_clx_enable()
421 tb_sw_dbg(sw, "CLx: %s disabled\n", clx_name(clx)); in tb_switch_clx_disable()
H A Dswitch.c387 tb_sw_dbg(sw, "NVM upgrade disabled\n"); in tb_switch_nvm_add()
1666 tb_sw_dbg(sw, "resetting\n"); in tb_switch_reset()
2816 tb_sw_dbg(sw, "linked ports %d <-> %d\n", in tb_switch_default_link_ports()
2875 tb_sw_dbg(sw, "current link speed %u.0 Gb/s\n", sw->link_speed); in tb_switch_link_init()
2876 tb_sw_dbg(sw, "current link width %s\n", width_name(sw->link_width)); in tb_switch_link_init()
3127 tb_sw_dbg(sw, "failed to change link width: %d\n", ret); in tb_switch_set_link_width()
3136 tb_sw_dbg(sw, "link width set to %s\n", width_name(width)); in tb_switch_set_link_width()
3276 tb_sw_dbg(sw, "uid: %#llx\n", sw->uid); in tb_switch_add()
3445 tb_sw_dbg(sw, "enabling wakeup: %#x\n", flags); in tb_switch_set_wake()
3447 tb_sw_dbg(sw, "disabling wakeup\n"); in tb_switch_set_wake()
[all …]
H A Dusb4.c176 tb_sw_dbg(sw, "PCIe wake: %s, USB3 wake: %s\n", in usb4_switch_check_wakes()
259 tb_sw_dbg(sw, "link: %s\n", sw->link_usb4 ? "USB4" : "TBT"); in usb4_switch_setup()
264 tb_sw_dbg(sw, "TBT3 support: %s, xHCI: %s\n", in usb4_switch_setup()
758 tb_sw_dbg(sw, "credit allocation parameters:\n"); in usb4_switch_credits_init()
768 tb_sw_dbg(sw, " USB3: %u\n", value); in usb4_switch_credits_init()
772 tb_sw_dbg(sw, " DP AUX: %u\n", value); in usb4_switch_credits_init()
776 tb_sw_dbg(sw, " DP main: %u\n", value); in usb4_switch_credits_init()
780 tb_sw_dbg(sw, " PCIe: %u\n", value); in usb4_switch_credits_init()
784 tb_sw_dbg(sw, " DMA: %u\n", value); in usb4_switch_credits_init()
788 tb_sw_dbg(sw, " unknown credit allocation index %#x, skipping\n", in usb4_switch_credits_init()
H A Dcap.c170 tb_sw_dbg(sw, "unknown capability %#x at %#x\n", in tb_switch_next_cap()
H A Deeprom.c549 tb_sw_dbg(sw, "reading DROM (length: %#x)\n", *size); in tb_drom_bit_bang()
626 tb_sw_dbg(sw, "DROM version: %d\n", header->device_rom_revision); in tb_drom_parse()
H A Dtb.c1176 tb_sw_dbg(up->sw, "configuring asymmetric link\n"); in tb_configure_asym()
1262 tb_sw_dbg(up->sw, "configuring symmetric link\n"); in tb_configure_sym()
1432 tb_sw_dbg(sw, "discovery, not touching CL states\n"); in tb_scan_port()
2282 tb_sw_dbg(sw, "xHCI disconnect request\n"); in tb_handle_hotplug()
2291 tb_sw_dbg(sw, "xHCI connect request\n"); in tb_handle_hotplug()
H A Dnvm.c304 tb_sw_dbg(sw, "router NVM format of vendor %#x unknown\n", in tb_nvm_alloc()
H A Dtb.h702 #define tb_sw_dbg(sw, fmt, arg...) __TB_SW_PRINT(tb_dbg, sw, fmt, ##arg) macro