Home
last modified time | relevance | path

Searched refs:tb_flags (Results 1 – 11 of 11) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dtranslate.c1224 uint32_t tb_flags = ctx->base.tb->flags; in riscv_tr_init_disas_context() local
1227 ctx->priv = FIELD_EX32(tb_flags, TB_FLAGS, PRIV); in riscv_tr_init_disas_context()
1228 ctx->mem_idx = FIELD_EX32(tb_flags, TB_FLAGS, MEM_IDX); in riscv_tr_init_disas_context()
1229 ctx->mstatus_fs = FIELD_EX32(tb_flags, TB_FLAGS, FS); in riscv_tr_init_disas_context()
1230 ctx->mstatus_vs = FIELD_EX32(tb_flags, TB_FLAGS, VS); in riscv_tr_init_disas_context()
1232 ctx->virt_enabled = FIELD_EX32(tb_flags, TB_FLAGS, VIRT_ENABLED); in riscv_tr_init_disas_context()
1236 ctx->vill = FIELD_EX32(tb_flags, TB_FLAGS, VILL); in riscv_tr_init_disas_context()
1237 ctx->sew = FIELD_EX32(tb_flags, TB_FLAGS, SEW); in riscv_tr_init_disas_context()
1238 ctx->lmul = sextract32(FIELD_EX32(tb_flags, TB_FLAGS, LMUL), 0, 3); in riscv_tr_init_disas_context()
1239 ctx->vta = FIELD_EX32(tb_flags, TB_FLAGS, VTA) && cpu->cfg.rvv_ta_all_1s; in riscv_tr_init_disas_context()
[all …]
/openbmc/qemu/target/microblaze/
H A Dtranslate.c70 unsigned int tb_flags; member
83 if (dc->tb_flags & IMM_FLAG) { in typeb_imm()
95 if ((dc->tb_flags ^ dc->base.tb->flags) & IFLAGS_TB_MASK) { in t_sync_flags()
96 tcg_gen_movi_i32(cpu_iflags, dc->tb_flags & IFLAGS_TB_MASK); in t_sync_flags()
140 if (cond && (dc->tb_flags & MSR_EE) in trap_illegal()
155 if (cond_user && (dc->tb_flags & MSR_EE)) { in trap_userspace()
167 if (dc->tb_flags & D_FLAG) { in invalid_delay_slot()
737 (dc->tb_flags & MSR_EE) && in do_load()
887 (dc->tb_flags & MSR_EE) && in do_store()
1042 if (type_b && (dc->tb_flags & IMM_FLAG)) { in setup_dslot()
[all …]
/openbmc/qemu/target/sparc/
H A Dcpu.h788 static inline bool tb_fpu_enabled(int tb_flags) in tb_fpu_enabled() argument
793 return tb_flags & TB_FLAG_FPU_ENABLED; in tb_fpu_enabled()
797 static inline bool tb_am_enabled(int tb_flags) in tb_am_enabled() argument
802 return tb_flags & TB_FLAG_AM_ENABLED; in tb_am_enabled()
/openbmc/qemu/target/hppa/
H A Dtranslate.c83 uint32_t tb_flags; member
178 if (ctx->tb_flags & PSW_W) { in expand_11a()
195 if (ctx->tb_flags & PSW_W) { in expand_12a()
211 if (ctx->tb_flags & PSW_W) { in expand_16()
220 return ctx->tb_flags & PSW_W ? 0 : sp; in sp0_if_wide()
509 } else if (ctx->tb_flags & TB_FLAG_SR_SAME) { in load_spr()
1534 if (ctx->tb_flags & TB_FLAG_SR_SAME) { in space_select()
1543 tcg_gen_shri_i64(tmp, base, (ctx->tb_flags & PSW_W ? 64 : 32) - 5); in space_select()
1579 gva_offset_mask(ctx->tb_flags)); in form_gva()
2230 ctx->tb_flags &= ~TB_FLAG_SR_SAME; in trans_mtsp()
[all …]
/openbmc/qemu/target/arm/tcg/
H A Dtranslate.c7518 CPUARMTBFlags tb_flags = arm_tbflags_from_tb(dc->base.tb); in arm_tr_init_disas_context() local
7525 dc->thumb = EX_TBFLAG_AM32(tb_flags, THUMB); in arm_tr_init_disas_context()
7526 dc->be_data = EX_TBFLAG_ANY(tb_flags, BE_DATA) ? MO_BE : MO_LE; in arm_tr_init_disas_context()
7527 condexec = EX_TBFLAG_AM32(tb_flags, CONDEXEC); in arm_tr_init_disas_context()
7550 core_mmu_idx = EX_TBFLAG_ANY(tb_flags, MMUIDX); in arm_tr_init_disas_context()
7556 dc->fp_excp_el = EX_TBFLAG_ANY(tb_flags, FPEXC_EL); in arm_tr_init_disas_context()
7557 dc->align_mem = EX_TBFLAG_ANY(tb_flags, ALIGN_MEM); in arm_tr_init_disas_context()
7558 dc->pstate_il = EX_TBFLAG_ANY(tb_flags, PSTATE__IL); in arm_tr_init_disas_context()
7559 dc->fgt_active = EX_TBFLAG_ANY(tb_flags, FGT_ACTIVE); in arm_tr_init_disas_context()
7560 dc->fgt_svc = EX_TBFLAG_ANY(tb_flags, FGT_SVC); in arm_tr_init_disas_context()
[all …]
H A Dtranslate-a64.c11676 CPUARMTBFlags tb_flags = arm_tbflags_from_tb(dc->base.tb); in aarch64_tr_init_disas_context() local
11685 dc->be_data = EX_TBFLAG_ANY(tb_flags, BE_DATA) ? MO_BE : MO_LE; in aarch64_tr_init_disas_context()
11688 core_mmu_idx = EX_TBFLAG_ANY(tb_flags, MMUIDX); in aarch64_tr_init_disas_context()
11690 dc->tbii = EX_TBFLAG_A64(tb_flags, TBII); in aarch64_tr_init_disas_context()
11691 dc->tbid = EX_TBFLAG_A64(tb_flags, TBID); in aarch64_tr_init_disas_context()
11692 dc->tcma = EX_TBFLAG_A64(tb_flags, TCMA); in aarch64_tr_init_disas_context()
11697 dc->fp_excp_el = EX_TBFLAG_ANY(tb_flags, FPEXC_EL); in aarch64_tr_init_disas_context()
11698 dc->align_mem = EX_TBFLAG_ANY(tb_flags, ALIGN_MEM); in aarch64_tr_init_disas_context()
11699 dc->pstate_il = EX_TBFLAG_ANY(tb_flags, PSTATE__IL); in aarch64_tr_init_disas_context()
11700 dc->fgt_active = EX_TBFLAG_ANY(tb_flags, FGT_ACTIVE); in aarch64_tr_init_disas_context()
[all …]
/openbmc/qemu/target/openrisc/
H A Dtranslate.c47 uint32_t tb_flags; member
66 return !(dc->tb_flags & TB_FLAGS_SM); in is_user()
183 if (dc->tb_flags & SR_OVE) { in gen_ove_cy()
190 if (dc->tb_flags & SR_OVE) { in gen_ove_ov()
197 if (dc->tb_flags & SR_OVE) { in gen_ove_cyov()
1531 dc->tb_flags = dc->base.tb->flags; in openrisc_tr_init_disas_context()
1532 dc->delayed_branch = (dc->tb_flags & TB_FLAGS_DFLAG) != 0; in openrisc_tr_init_disas_context()
1548 if (dc->tb_flags & TB_FLAGS_R0_0) { in openrisc_tr_tb_start()
1597 if ((dc->tb_flags & TB_FLAGS_DFLAG ? 1 : 0) != (dc->delayed_branch != 0)) { in openrisc_tr_tb_stop()
/openbmc/qemu/target/rx/
H A Dtranslate.c39 uint32_t tb_flags; member
239 if (FIELD_EX32(ctx->tb_flags, PSW, PM)) { in is_privileged()
328 if (FIELD_EX32(ctx->tb_flags, PSW, U)) { in move_from_cr()
344 if (FIELD_EX32(ctx->tb_flags, PSW, U)) { in move_from_cr()
382 if (FIELD_EX32(ctx->tb_flags, PSW, U)) { in move_to_cr()
398 if (FIELD_EX32(ctx->tb_flags, PSW, U)) { in move_to_cr()
2075 if (FIELD_EX32(ctx->tb_flags, PSW, U) != val) { in clrsetpsw()
2076 ctx->tb_flags = FIELD_DP32(ctx->tb_flags, PSW, U, val); in clrsetpsw()
2201 ctx->tb_flags = ctx->base.tb->flags; in rx_tr_init_disas_context()
/openbmc/qemu/target/avr/
H A Dtranslate.c2659 uint32_t tb_flags = ctx->base.tb->flags; in avr_tr_init_disas_context() local
2666 if (tb_flags & TB_FLAGS_SKIP) { in avr_tr_init_disas_context()
2671 if (tb_flags & TB_FLAGS_FULL_ACCESS) { in avr_tr_init_disas_context()
/openbmc/qemu/target/xtensa/
H A Dtranslate.c1128 uint32_t tb_flags = dc->base.tb->flags; in xtensa_tr_init_disas_context() local
1132 dc->ring = tb_flags & XTENSA_TBFLAG_RING_MASK; in xtensa_tr_init_disas_context()
1133 dc->cring = (tb_flags & XTENSA_TBFLAG_EXCM) ? 0 : dc->ring; in xtensa_tr_init_disas_context()
1138 dc->debug = tb_flags & XTENSA_TBFLAG_DEBUG; in xtensa_tr_init_disas_context()
1139 dc->icount = tb_flags & XTENSA_TBFLAG_ICOUNT; in xtensa_tr_init_disas_context()
1140 dc->cpenable = (tb_flags & XTENSA_TBFLAG_CPENABLE_MASK) >> in xtensa_tr_init_disas_context()
1142 dc->window = ((tb_flags & XTENSA_TBFLAG_WINDOW_MASK) >> in xtensa_tr_init_disas_context()
1144 dc->cwoe = tb_flags & XTENSA_TBFLAG_CWOE; in xtensa_tr_init_disas_context()
1145 dc->callinc = ((tb_flags & XTENSA_TBFLAG_CALLINC_MASK) >> in xtensa_tr_init_disas_context()
/openbmc/qemu/target/tricore/
H A Dtranslate.c8357 uint32_t tb_flags = (uint32_t)ctx->base.tb->flags; in tricore_tr_init_disas_context() local
8358 ctx->priv = FIELD_EX32(tb_flags, TB_FLAGS, PRIV); in tricore_tr_init_disas_context()