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/openbmc/linux/tools/testing/selftests/arm64/fp/
H A DMakefile9 sve-ptrace sve-probe-vls \
13 rdvl-sme rdvl-sve \
14 sve-test \
20 TEST_PROGS_EXTENDED := fpsimd-stress sve-stress ssve-stress za-stress
29 $(OUTPUT)/rdvl-sve: rdvl-sve.c $(OUTPUT)/rdvl.o
31 $(OUTPUT)/sve-ptrace: sve-ptrace.c
32 $(OUTPUT)/sve-probe-vls: sve-probe-vls.c $(OUTPUT)/rdvl.o
33 $(OUTPUT)/sve-test: sve-test.S $(OUTPUT)/asm-utils.o
35 $(OUTPUT)/ssve-test: sve-test.S $(OUTPUT)/asm-utils.o
H A Dsve-ptrace.c114 struct user_sve_header *sve; in get_sve() local
116 size_t sz = sizeof *sve; in get_sve()
136 sve = *buf; in get_sve()
137 if (sve->size <= sz) in get_sve()
140 sz = sve->size; in get_sve()
143 return sve; in get_sve()
150 const struct user_sve_header *sve) in set_sve() argument
154 iov.iov_base = (void *)sve; in set_sve()
155 iov.iov_len = sve->size; in set_sve()
162 struct user_sve_header sve; in ptrace_set_get_inherit() local
[all …]
H A DREADME7 sve-probe-vls - Checks the SVE vector length enumeration interface
8 sve-ptrace - Checks the SVE ptrace interface
13 sve-stress performs an SVE context switch stress test, as described
17 "sve" in the following commands.)
25 $ ./sve-stress
67 To try to reproduce the bugs that we have been observing, sve-stress
73 $ lkvm run --console=virtio -pconsole=hvc0 --sve Image
88 2) Run the sve-stress on *each* guest with the Vector-Length set to 32:
89 guest$ ./vlset --inherit 32 ./sve-stress
91 3) Run the sve-stress on the host with the maximum Vector-Length:
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H A D.gitignore5 rdvl-sve
6 sve-probe-vls
7 sve-ptrace
8 sve-test
H A Drdvl.S6 .arch_extension sve
H A Dsve-stress45 ./sve-test >$log &
H A Dza-fork-asm.S6 .arch_extension sve
/openbmc/qemu/tests/tcg/aarch64/
H A DMakefile.target24 $(call cc-option,-march=armv8.1-a+sve, CROSS_CC_HAS_SVE); \
104 AARCH64_TESTS += sve-ioctls
105 sve-ioctls: CFLAGS += $(CROSS_CC_HAS_SVE)
107 sha512-sve: CFLAGS=-O3 -march=armv8.1-a+sve
108 sha512-sve: sha512.c
111 sve-str: CFLAGS=-O1 -march=armv8.1-a+sve
112 sve-str: sve-str.c
115 TESTS += sha512-sve sve-str
124 --bin $< --test $(AARCH64_SRC)/gdbstub/test-sve.py, \
127 run-gdbstub-sve-ioctls: sve-ioctls
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H A DMakefile.softmmu-target48 memory-sve: memory.c $(LINK_SCRIPT) $(CRT_OBJS) $(MINILIB_OBJS)
51 memory-sve: CFLAGS+=-DCHECK_UNALIGNED=1 -march=armv8.1-a+sve -O3
53 TESTS+=memory-sve
/openbmc/openbmc/poky/meta/conf/machine/include/arm/
H A Darch-armv8-4a.inc9 require conf/machine/include/arm/feature-arm-sve.inc
12 AVAILTUNES += "armv8-4a armv8-4a-crypto armv8-4a-crypto-sve"
15 ARMPKGARCH:tune-armv8-4a-crypto-sve ?= "armv8-4a"
18 TUNE_FEATURES:tune-armv8-4a-crypto-sve = "${TUNE_FEATURES:tune-armv8-4a-crypto} sve"
21 PACKAGE_EXTRA_ARCHS:tune-armv8-4a-crypto-sve = "${PACKAGE_EXTRA_ARCHS:tune-armv8-4a-crypto} armv8-4…
24 BASE_LIB:tune-armv8-4a-crypto-sve = "lib64"
H A Darch-armv8-5a.inc9 require conf/machine/include/arm/feature-arm-sve.inc
12 AVAILTUNES += "armv8-5a armv8-5a-crypto armv8-5a-crypto-sve"
15 ARMPKGARCH:tune-armv8-5a-crypto-sve ?= "armv8-5a"
18 TUNE_FEATURES:tune-armv8-5a-crypto-sve = "${TUNE_FEATURES:tune-armv8-5a-crypto} sve"
21 PACKAGE_EXTRA_ARCHS:tune-armv8-5a-crypto-sve = "${PACKAGE_EXTRA_ARCHS:tune-armv8-5a-crypto} armv8-5…
24 BASE_LIB:tune-armv8-5a-crypto-sve = "lib64"
H A Darch-armv8-3a.inc10 AVAILTUNES += "armv8-3a armv8-3a-crypto armv8-3a-crypto-sve"
13 ARMPKGARCH:tune-armv8-3a-crypto-sve ?= "armv8-3a"
16 TUNE_FEATURES:tune-armv8-3a-crypto-sve = "${TUNE_FEATURES:tune-armv8-3a-crypto} sve"
19 PACKAGE_EXTRA_ARCHS:tune-armv8-3a-crypto-sve = "${PACKAGE_EXTRA_ARCHS:tune-armv8-3a-crypto} armv8-3…
22 BASE_LIB:tune-armv8-3a-crypto-sve = "lib64"
H A Darch-armv8-6a.inc10 AVAILTUNES += "armv8-6a armv8-6a-crypto armv8-6a-crypto-sve"
13 ARMPKGARCH:tune-armv8-6a-crypto-sve ?= "armv8-6a"
16 TUNE_FEATURES:tune-armv8-6a-crypto-sve = "${TUNE_FEATURES:tune-armv8-6a-crypto} sve"
19 PACKAGE_EXTRA_ARCHS:tune-armv8-6a-crypto-sve = "${PACKAGE_EXTRA_ARCHS:tune-armv8-6a-crypto} armv8-6…
22 BASE_LIB:tune-armv8-6a-crypto-sve = "lib64"
H A Dfeature-arm-sve.inc4 TUNEVALID[sve] = "Enable SVE instructions for ARMv8"
5 TUNE_CCARGS_MARCH_OPTS .= "${@bb.utils.contains('TUNE_FEATURES', 'sve', '+sve', '', d)}"
/openbmc/linux/tools/testing/selftests/arm64/signal/testcases/
H A Dsve_regs.c47 struct sve_context *sve; in do_one_sve_vl() local
71 sve = (struct sve_context *)head; in do_one_sve_vl()
72 if (sve->vl != vl) { in do_one_sve_vl()
73 fprintf(stderr, "Got VL %d, expected %d\n", sve->vl, vl); in do_one_sve_vl()
79 head->size, sve->vl); in do_one_sve_vl()
H A Dtestcases.c61 bool validate_sve_context(struct sve_context *sve, char **err) in validate_sve_context() argument
65 = ((SVE_SIG_CONTEXT_SIZE(sve_vq_from_vl(sve->vl)) + 15) / 16) * 16; in validate_sve_context()
67 if (!sve || !err) in validate_sve_context()
71 if ((sve->head.size != sizeof(struct sve_context)) && in validate_sve_context()
72 (sve->head.size != regs_size)) { in validate_sve_context()
77 if (!sve_vl_valid(sve->vl)) { in validate_sve_context()
138 struct sve_context *sve = NULL; in validate_reserved() local
195 sve = (struct sve_context *)head; in validate_reserved()
264 if (!validate_sve_context(sve, err)) in validate_reserved()
H A Dsve_vl.c34 struct sve_context *sve; in sve_vl() local
46 sve = (struct sve_context *)head; in sve_vl()
48 if (sve->vl != vl) { in sve_vl()
50 sve->vl, vl); in sve_vl()
H A Dfake_sigreturn_sve_change_vl.c38 struct sve_context *sve; in fake_sigreturn_sve_change_vl() local
56 sve = (struct sve_context *)head; in fake_sigreturn_sve_change_vl()
60 sve->vl, vls[0]); in fake_sigreturn_sve_change_vl()
61 sve->vl = vls[0]; in fake_sigreturn_sve_change_vl()
/openbmc/qemu/linux-user/aarch64/
H A Dsignal.c195 static void target_setup_sve_record(struct target_sve_context *sve, in target_setup_sve_record() argument
200 memset(sve, 0, sizeof(*sve)); in target_setup_sve_record()
201 __put_user(TARGET_SVE_MAGIC, &sve->head.magic); in target_setup_sve_record()
202 __put_user(size, &sve->head.size); in target_setup_sve_record()
203 __put_user(vq * TARGET_SVE_VQ_BYTES, &sve->vl); in target_setup_sve_record()
205 __put_user(TARGET_SVE_SIG_FLAG_SM, &sve->flags); in target_setup_sve_record()
213 uint64_t *z = (void *)sve + TARGET_SVE_SIG_ZREG_OFFSET(vq, i); in target_setup_sve_record()
219 uint16_t *p = (void *)sve + TARGET_SVE_SIG_PREG_OFFSET(vq, i); in target_setup_sve_record()
300 struct target_sve_context *sve, in target_restore_sve_record() argument
306 __get_user(vl, &sve->vl); in target_restore_sve_record()
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/openbmc/linux/tools/testing/selftests/arm64/abi/
H A Dsyscall-abi.c412 int sve, sme; in test_one_syscall() local
419 for (sve = 0; sve < sve_vl_count; sve++) { in test_one_syscall()
420 ret = prctl(PR_SVE_SET_VL, sve_vls[sve]); in test_one_syscall()
425 ksft_test_result(do_test(cfg, sve_vls[sve], default_sme_vl, 0), in test_one_syscall()
426 "%s SVE VL %d\n", cfg->name, sve_vls[sve]); in test_one_syscall()
434 ksft_test_result(do_test(cfg, sve_vls[sve], in test_one_syscall()
438 cfg->name, sve_vls[sve], in test_one_syscall()
440 ksft_test_result(do_test(cfg, sve_vls[sve], in test_one_syscall()
443 cfg->name, sve_vls[sve], in test_one_syscall()
445 ksft_test_result(do_test(cfg, sve_vls[sve], in test_one_syscall()
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/openbmc/qemu/docs/system/arm/
H A Dcpu-features.rst48 "sve128": true, "aarch64": true, "sve1024": true, "sve": true,
54 We see that the ``max`` CPU type has the ``pmu``, ``aarch64``, ``sve``, and many
55 ``sve<N>`` CPU features. We also see that all the CPU features are
56 enabled, as they are all ``true``. (The ``sve<N>`` CPU features are all
68 "sve128": true, "aarch64": true, "sve1024": true, "sve": true,
87 (4) Let's disable ``sve`` and see what happens to all the optional SVE
90 (QEMU) query-cpu-model-expansion type=full model={"name":"max","props":{"sve":false}}
94 "sve128": false, "aarch64": true, "sve1024": false, "sve": false,
158 $ qemu-system-aarch64 -M virt -cpu max,pmu=off,sve=on,sve128=on,sve256=on
161 lengths for the ``max`` CPU type. Note, the ``sve=on`` isn't actually
[all …]
/openbmc/qemu/target/arm/
H A Darch_dump.c82 struct aarch64_user_sve_header sve; member
197 buf = (uint8_t *)&note->sve; in aarch64_write_elf64_sve()
201 note->sve.size = cpu_to_dump32(s, sve_size_vq(vq)); in aarch64_write_elf64_sve()
202 note->sve.max_size = cpu_to_dump32(s, sve_size_vq(cpu->sve_max_vq)); in aarch64_write_elf64_sve()
203 note->sve.vl = cpu_to_dump16(s, vq * 16); in aarch64_write_elf64_sve()
204 note->sve.max_vl = cpu_to_dump16(s, cpu->sve_max_vq * 16); in aarch64_write_elf64_sve()
205 note->sve.flags = cpu_to_dump16(s, 1); in aarch64_write_elf64_sve()
/openbmc/qemu/target/arm/tcg/
H A Dmeson.build3 decodetree.process('sve.decode', extra_args: '--decode=disas_sve'),
48 'translate-sve.c',
/openbmc/linux/arch/arm64/kernel/
H A Dsignal.c177 struct sve_context __user *sve; member
280 if (user->sve_size < sizeof(*user->sve)) in restore_sve_fpsimd_context()
283 __get_user_error(user_vl, &(user->sve->vl), err); in restore_sve_fpsimd_context()
284 __get_user_error(flags, &(user->sve->flags), err); in restore_sve_fpsimd_context()
308 if (user->sve_size == sizeof(*user->sve)) { in restore_sve_fpsimd_context()
337 (char __user const *)user->sve + in restore_sve_fpsimd_context()
589 user->sve = NULL; in parse_user_sigframe()
647 if (user->sve) in parse_user_sigframe()
650 user->sve = (struct sve_context __user *)head; in parse_user_sigframe()
800 if (user.sve) in restore_sigframe()
/openbmc/linux/Documentation/arch/arm64/
H A Dindex.rst27 sve

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