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Searched refs:src_disp1_0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock.c966 sel = readl(&clk->src_disp1_0); in exynos5_get_lcd_clk()
1140 clrsetbits_le32(&clk->src_disp1_0, 0xf, 0x6); in exynos5_set_lcd_clk()
H A Dclock_init_exynos5.c773 writel(CLK_SRC_DISP1_0_VAL, &clk->src_disp1_0); in exynos5250_system_clock_init()
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dclock.h680 unsigned int src_disp1_0; member