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Searched refs:src_clk_div (Results 1 – 9 of 9) sorted by relevance

/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rv1108.c202 int src_clk_div; in rv1108_saradc_set_clk() local
204 src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1; in rv1108_saradc_set_clk()
205 assert(src_clk_div < 128); in rv1108_saradc_set_clk()
209 src_clk_div << CLK_SARADC_DIV_CON_SHIFT); in rv1108_saradc_set_clk()
227 int src_clk_div; in rv1108_aclk_vio1_set_clk() local
229 src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz) - 1; in rv1108_aclk_vio1_set_clk()
230 assert(src_clk_div < 32); in rv1108_aclk_vio1_set_clk()
234 (src_clk_div << ACLK_VIO1_CLK_DIV_SHIFT) | in rv1108_aclk_vio1_set_clk()
253 int src_clk_div; in rv1108_aclk_vio0_set_clk() local
255 src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz) - 1; in rv1108_aclk_vio0_set_clk()
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H A Dclk_rk3128.c310 int src_clk_div; in rockchip_mmc_set_clk() local
316 src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq); in rockchip_mmc_set_clk()
318 if (src_clk_div > 128) { in rockchip_mmc_set_clk()
319 src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq); in rockchip_mmc_set_clk()
330 (src_clk_div - 1) << EMMC_DIV_SHIFT); in rockchip_mmc_set_clk()
337 (src_clk_div - 1) << MMC0_DIV_SHIFT); in rockchip_mmc_set_clk()
369 int src_clk_div; in rk3128_peri_set_pclk() local
371 src_clk_div = PERI_ACLK_HZ / hz; in rk3128_peri_set_pclk()
372 assert(src_clk_div - 1 < 4); in rk3128_peri_set_pclk()
381 ((src_clk_div - 1) << 12)); in rk3128_peri_set_pclk()
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H A Dclk_rk3399.c554 int src_clk_div; in rk3399_i2c_set_clk() local
557 src_clk_div = GPLL_HZ / hz; in rk3399_i2c_set_clk()
558 assert(src_clk_div - 1 < 127); in rk3399_i2c_set_clk()
563 I2C_CLK_REG_VALUE(1, src_clk_div)); in rk3399_i2c_set_clk()
567 I2C_CLK_REG_VALUE(2, src_clk_div)); in rk3399_i2c_set_clk()
571 I2C_CLK_REG_VALUE(3, src_clk_div)); in rk3399_i2c_set_clk()
575 I2C_CLK_REG_VALUE(5, src_clk_div)); in rk3399_i2c_set_clk()
579 I2C_CLK_REG_VALUE(6, src_clk_div)); in rk3399_i2c_set_clk()
583 I2C_CLK_REG_VALUE(7, src_clk_div)); in rk3399_i2c_set_clk()
654 int src_clk_div; in rk3399_spi_set_clk() local
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H A Dclk_rk3328.c360 int src_clk_div; in rk3328_i2c_set_clk() local
362 src_clk_div = GPLL_HZ / hz; in rk3328_i2c_set_clk()
363 assert(src_clk_div - 1 < 127); in rk3328_i2c_set_clk()
370 (src_clk_div - 1) << CLK_I2C0_DIV_CON_SHIFT | in rk3328_i2c_set_clk()
377 (src_clk_div - 1) << CLK_I2C1_DIV_CON_SHIFT | in rk3328_i2c_set_clk()
384 (src_clk_div - 1) << CLK_I2C2_DIV_CON_SHIFT | in rk3328_i2c_set_clk()
391 (src_clk_div - 1) << CLK_I2C3_DIV_CON_SHIFT | in rk3328_i2c_set_clk()
399 return DIV_TO_RATE(GPLL_HZ, src_clk_div); in rk3328_i2c_set_clk()
469 int src_clk_div; in rk3328_mmc_set_clk() local
486 src_clk_div = DIV_ROUND_UP(GPLL_HZ / 2, set_rate); in rk3328_mmc_set_clk()
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H A Dclk_rk3288.c607 int src_clk_div; in rockchip_mmc_set_clk() local
612 src_clk_div = DIV_ROUND_UP(gclk_rate / 2, freq); in rockchip_mmc_set_clk()
614 if (src_clk_div > 0x3f) { in rockchip_mmc_set_clk()
615 src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq); in rockchip_mmc_set_clk()
616 assert(src_clk_div < 0x40); in rockchip_mmc_set_clk()
631 (src_clk_div - 1) << EMMC_DIV_SHIFT); in rockchip_mmc_set_clk()
638 (src_clk_div - 1) << MMC0_DIV_SHIFT); in rockchip_mmc_set_clk()
645 (src_clk_div - 1) << SDIO0_DIV_SHIFT); in rockchip_mmc_set_clk()
687 int src_clk_div; in rockchip_spi_set_clk() local
690 src_clk_div = DIV_ROUND_UP(gclk_rate, freq) - 1; in rockchip_spi_set_clk()
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H A Dclk_rk3188.c290 int src_clk_div; in rockchip_mmc_set_clk() local
294 src_clk_div = DIV_ROUND_UP(gclk_rate / 2, freq) - 1; in rockchip_mmc_set_clk()
295 assert(src_clk_div <= 0x3f); in rockchip_mmc_set_clk()
302 src_clk_div << EMMC_DIV_SHIFT); in rockchip_mmc_set_clk()
308 src_clk_div << MMC0_DIV_SHIFT); in rockchip_mmc_set_clk()
314 src_clk_div << SDIO_DIV_SHIFT); in rockchip_mmc_set_clk()
348 int src_clk_div = DIV_ROUND_UP(gclk_rate, freq) - 1; in rockchip_spi_set_clk() local
350 assert(src_clk_div < 128); in rockchip_spi_set_clk()
353 assert(src_clk_div <= SPI0_DIV_MASK); in rockchip_spi_set_clk()
356 src_clk_div << SPI0_DIV_SHIFT); in rockchip_spi_set_clk()
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H A Dclk_rk3036.c241 int src_clk_div; in rockchip_mmc_set_clk() local
247 src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq); in rockchip_mmc_set_clk()
249 if (src_clk_div > 128) { in rockchip_mmc_set_clk()
250 src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq); in rockchip_mmc_set_clk()
251 assert(src_clk_div - 1 < 128); in rockchip_mmc_set_clk()
263 (src_clk_div - 1) << EMMC_DIV_SHIFT); in rockchip_mmc_set_clk()
270 (src_clk_div - 1) << MMC0_DIV_SHIFT); in rockchip_mmc_set_clk()
H A Dclk_rk3368.c403 int src_clk_div; in rk3368_spi_set_clk() local
405 src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz); in rk3368_spi_set_clk()
406 assert(src_clk_div < 127); in rk3368_spi_set_clk()
421 ((src_clk_div << spiclk->div_shift) | in rk3368_spi_set_clk()
440 int src_clk_div; in rk3368_saradc_set_clk() local
442 src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1; in rk3368_saradc_set_clk()
443 assert(src_clk_div < 128); in rk3368_saradc_set_clk()
447 src_clk_div << CLK_SARADC_DIV_CON_SHIFT); in rk3368_saradc_set_clk()
H A Dclk_rk322x.c277 int src_clk_div; in rockchip_mmc_set_clk() local
283 src_clk_div = DIV_ROUND_UP(clk_general_rate / 2, freq); in rockchip_mmc_set_clk()
285 if (src_clk_div > 128) { in rockchip_mmc_set_clk()
286 src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq); in rockchip_mmc_set_clk()
287 assert(src_clk_div - 1 < 128); in rockchip_mmc_set_clk()
301 (src_clk_div - 1) << EMMC_DIV_SHIFT); in rockchip_mmc_set_clk()
308 (src_clk_div - 1) << MMC0_DIV_SHIFT); in rockchip_mmc_set_clk()