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Searched refs:sram (Results 1 – 25 of 406) sorted by relevance

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/openbmc/linux/drivers/misc/
H A Dsram.c55 static int sram_add_pool(struct sram_dev *sram, struct sram_reserve *block, in sram_add_pool() argument
60 part->pool = devm_gen_pool_create(sram->dev, ilog2(SRAM_GRANULARITY), in sram_add_pool()
68 dev_err(sram->dev, "failed to register subpool: %d\n", ret); in sram_add_pool()
75 static int sram_add_export(struct sram_dev *sram, struct sram_reserve *block, in sram_add_export() argument
79 part->battr.attr.name = devm_kasprintf(sram->dev, GFP_KERNEL, in sram_add_export()
90 return device_create_bin_file(sram->dev, &part->battr); in sram_add_export()
93 static int sram_add_partition(struct sram_dev *sram, struct sram_reserve *block, in sram_add_partition() argument
97 struct sram_partition *part = &sram->partition[sram->partitions]; in sram_add_partition()
101 if (sram->config && sram->config->map_only_reserved) { in sram_add_partition()
104 if (sram->no_memory_wc) in sram_add_partition()
[all …]
/openbmc/linux/drivers/net/wireless/ath/ath9k/
H A Dar9003_aic.c279 struct ath_aic_sram_info sram; in ar9003_aic_cal_post_process() local
282 cal_sram_valid[i] = sram.valid = in ar9003_aic_cal_post_process()
284 sram.rot_quad_att_db = in ar9003_aic_cal_post_process()
286 sram.vga_quad_sign = in ar9003_aic_cal_post_process()
288 sram.rot_dir_att_db = in ar9003_aic_cal_post_process()
290 sram.vga_dir_sign = in ar9003_aic_cal_post_process()
292 sram.com_att_6db = in ar9003_aic_cal_post_process()
295 if (sram.valid) { in ar9003_aic_cal_post_process()
296 dir_path_gain_idx = sram.rot_dir_att_db + in ar9003_aic_cal_post_process()
297 com_att_db_table[sram.com_att_6db]; in ar9003_aic_cal_post_process()
[all …]
/openbmc/u-boot/board/samsung/common/
H A Dexynos-uboot-spl.lds11 MEMORY { .sram : ORIGIN = IMAGE_TEXT_BASE, \
26 } >.sram
29 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
32 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
37 } >.sram
40 .machine_param : { *(.machine_param) } >.sram
48 } >.sram
57 } >.sram
/openbmc/u-boot/board/Barix/ipam390/
H A Du-boot-spl-ipam390.lds10 MEMORY { .sram : ORIGIN = IMAGE_TEXT_BASE,\
27 } >.sram
30 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
33 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
40 } >.sram
49 } >.sram
56 } >.sram
/openbmc/u-boot/board/davinci/da8xxevm/
H A Du-boot-spl-da850evm.lds10 MEMORY { .sram : ORIGIN = IMAGE_TEXT_BASE,\
27 } >.sram
30 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
33 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
36 .u_boot_list : { KEEP(*(SORT(.u_boot_list*))); } >.sram
43 } >.sram
52 } >.sram
/openbmc/u-boot/arch/arm/cpu/armv8/
H A Du-boot-spl.lds14 MEMORY { .sram : ORIGIN = IMAGE_TEXT_BASE,
29 } >.sram
34 } >.sram
39 } >.sram
44 } >.sram
49 } >.sram
54 } >.sram
/openbmc/u-boot/arch/arm/cpu/arm926ejs/spear/
H A Du-boot-spl.lds15 MEMORY { .sram : ORIGIN = IMAGE_TEXT_BASE,\
29 } > .sram
32 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
35 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
40 } > .sram
53 } > .sram
/openbmc/u-boot/arch/arm/mach-at91/arm926ejs/
H A Du-boot-spl.lds7 MEMORY { .sram : ORIGIN = IMAGE_TEXT_BASE, \
23 } >.sram
26 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
29 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
32 .u_boot_list : { KEEP(*(SORT(.u_boot_list*))) } > .sram
40 } >.sram
/openbmc/linux/arch/arm/boot/dts/nxp/lpc/
H A Dlpc4350.dtsi24 sram0: sram@10000000 {
25 compatible = "mmio-sram";
29 sram1: sram@10080000 {
30 compatible = "mmio-sram";
34 sram2: sram@20000000 {
35 compatible = "mmio-sram";
H A Dlpc4357.dtsi24 sram0: sram@10000000 {
25 compatible = "mmio-sram";
29 sram1: sram@10080000 {
30 compatible = "mmio-sram";
34 sram2: sram@20000000 {
35 compatible = "mmio-sram";
/openbmc/u-boot/arch/arm/mach-at91/armv7/
H A Du-boot-spl.lds14 MEMORY { .sram : ORIGIN = IMAGE_TEXT_BASE, \
30 } >.sram
33 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
36 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
39 .u_boot_list : { KEEP(*(SORT(.u_boot_list*))) } > .sram
47 } >.sram
/openbmc/u-boot/arch/arm/mach-omap2/
H A Du-boot-spl.lds11 MEMORY { .sram : ORIGIN = IMAGE_TEXT_BASE,\
27 } >.sram
30 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
33 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
38 } >.sram
/openbmc/u-boot/arch/arm/mach-zynq/
H A Du-boot-spl.lds10 MEMORY { .sram : ORIGIN = IMAGE_TEXT_BASE,\
27 } > .sram
32 } > .sram
37 } > .sram
42 } > .sram
/openbmc/u-boot/arch/arm/cpu/armv7/sunxi/
H A Du-boot-spl.lds16 MEMORY { .sram : ORIGIN = IMAGE_TEXT_BASE,\
32 } > .sram
35 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
38 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
43 } > .sram
/openbmc/linux/arch/powerpc/platforms/52xx/
H A Dmpc52xx_pm.c12 extern void mpc52xx_deep_sleep(void __iomem *sram, void __iomem *sdram_regs,
24 static void __iomem *sram; variable
93 sram = mbar + 0x8000; /* Those will be handled by the */ in mpc52xx_pm_prepare()
135 memcpy(saved_sram, sram, sram_size); in mpc52xx_pm_enter()
138 memcpy(sram, mpc52xx_ds_sram, mpc52xx_ds_sram_size); in mpc52xx_pm_enter()
162 mpc52xx_deep_sleep(sram, sdram, cdm, intr); in mpc52xx_pm_enter()
178 memcpy(sram, saved_sram, sram_size); in mpc52xx_pm_enter()
/openbmc/linux/arch/arm64/boot/dts/arm/
H A Djuno-scmi.dtsi200 &sram {
201 /delete-node/ scp-sram@0;
202 /delete-node/ scp-sram@200;
204 cpu_scp_lpri0: scp-sram@0 {
209 cpu_scp_lpri1: scp-sram@80 {
214 cpu_scp_hpri0: scp-sram@100 {
219 cpu_scp_hpri1: scp-sram@180 {
/openbmc/linux/drivers/fsi/
H A Dfsi-master-ast-cf.c111 void __iomem *sram; member
315 iowrite32be(op, master->sram + CMD_STAT_REG); in do_copro_command()
328 stat = ioread8(master->sram + CMD_STAT_REG); in do_copro_command()
366 iowrite32be((cmd->msg >> 32), master->sram + CMD_DATA); in send_request()
367 iowrite32be((cmd->msg & 0xffffffff), master->sram + CMD_DATA + 4); in send_request()
380 uint8_t rtag = ioread8(master->sram + STAT_RTAG) & 0xf; in read_copro_response()
381 uint8_t rcrc = ioread8(master->sram + STAT_RCRC) & 0xf; in read_copro_response()
392 rdata = ioread32be(master->sram + RSP_DATA); in read_copro_response()
448 ioread32be(master->sram + CMD_STAT_REG), in dump_ucode_trace()
449 ioread8(master->sram + STAT_RTAG), in dump_ucode_trace()
[all …]
/openbmc/linux/arch/arm/mach-omap1/
H A Dsram-init.c61 void *sram; in omap_sram_push() local
66 sram = omap_sram_push_address(size); in omap_sram_push()
67 if (!sram) in omap_sram_push()
70 base = (unsigned long)sram & PAGE_MASK; in omap_sram_push()
75 dst = fncpy(sram, funcp, size); in omap_sram_push()
/openbmc/u-boot/arch/arm/cpu/arm1136/
H A Du-boot-spl.lds11 MEMORY { .sram : ORIGIN = IMAGE_TEXT_BASE,\
27 } >.sram
30 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
33 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
/openbmc/linux/Documentation/devicetree/bindings/arm/omap/
H A Dmpu.txt14 - sram: Phandle to the ocmcram node
17 - pm-sram: Phandles to ocmcram nodes to be used for power management.
20 data region for code. See Documentation/devicetree/bindings/sram/sram.yaml
52 pm-sram = <&pm_sram_code
/openbmc/linux/drivers/firmware/tegra/
H A Dbpmp-tegra186.c24 void __iomem *sram; member
127 iosys_map_set_vaddr_iomem(&rx, priv->rx.sram + offset); in tegra186_bpmp_channel_init()
128 iosys_map_set_vaddr_iomem(&tx, priv->tx.sram + offset); in tegra186_bpmp_channel_init()
187 gen_pool_free(priv->tx.pool, (unsigned long)priv->tx.sram, 4096); in tegra186_bpmp_teardown_channels()
188 gen_pool_free(priv->rx.pool, (unsigned long)priv->rx.sram, 4096); in tegra186_bpmp_teardown_channels()
244 priv->tx.sram = (void __iomem *)gen_pool_dma_alloc(priv->tx.pool, 4096, in tegra186_bpmp_sram_init()
246 if (!priv->tx.sram) { in tegra186_bpmp_sram_init()
258 priv->rx.sram = (void __iomem *)gen_pool_dma_alloc(priv->rx.pool, 4096, in tegra186_bpmp_sram_init()
260 if (!priv->rx.sram) { in tegra186_bpmp_sram_init()
269 gen_pool_free(priv->tx.pool, (unsigned long)priv->tx.sram, 4096); in tegra186_bpmp_sram_init()
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dhi6220-clock.txt28 - hisilicon,hi6220-clk-sram: phandle to the syscon managing the SoC internal sram;
29 the driver need use the sram to pass parameters for frequency change.
44 hisilicon,hi6220-clk-sram = <&sram>;
/openbmc/linux/drivers/memory/
H A DMakefile30 obj-$(CONFIG_TI_EMIF_SRAM) += ti-emif-sram.o
33 ti-emif-sram-objs := ti-emif-pm.o ti-emif-sram-pm.o
35 $(obj)/ti-emif-sram-pm.o: $(obj)/ti-emif-asm-offsets.h
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dat91sam9xe.dtsi15 sram0: sram@2ff000 {
19 sram1: sram@300000 {
20 compatible = "mmio-sram";
/openbmc/linux/arch/arm/mach-omap2/
H A Dsram.c83 void *sram; in omap_sram_push() local
88 sram = omap_sram_push_address(size); in omap_sram_push()
89 if (!sram) in omap_sram_push()
92 base = (unsigned long)sram & PAGE_MASK; in omap_sram_push()
97 dst = fncpy(sram, funcp, size); in omap_sram_push()

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