Home
last modified time | relevance | path

Searched refs:sfsr (Results 1 – 12 of 12) sorted by relevance

/openbmc/qemu/target/sparc/
H A Dmmu_helper.c504 uint64_t sfsr = SFSR_VALID_BIT; in build_sfsr() local
508 sfsr |= SFSR_CT_NOTRANS; in build_sfsr()
512 sfsr |= SFSR_CT_PRIMARY; in build_sfsr()
516 sfsr |= SFSR_CT_SECONDARY; in build_sfsr()
519 sfsr |= SFSR_CT_NUCLEUS; in build_sfsr()
526 sfsr |= SFSR_WRITE_BIT; in build_sfsr()
528 sfsr |= SFSR_NF_BIT; in build_sfsr()
532 sfsr |= SFSR_PR_BIT; in build_sfsr()
535 if (env->dmmu.sfsr & SFSR_VALID_BIT) { /* Fault status register */ in build_sfsr()
536 sfsr |= SFSR_OW_BIT; /* overflow (not read before another fault) */ in build_sfsr()
[all …]
H A Dldst_helper.c1419 ret = env->immu.sfsr; in helper_ld_asi()
1477 ret = env->dmmu.sfsr; in helper_ld_asi()
1743 env->immu.sfsr = val; in helper_st_asi()
1814 env->dmmu.sfsr = val; in helper_st_asi()
H A Dcpu.h391 uint64_t sfsr; member
/openbmc/linux/arch/sparc/kernel/
H A Dentry.h97 unsigned long sfsr);
119 unsigned long sfsr,
122 unsigned long sfsr,
125 unsigned long sfsr,
128 unsigned long sfsr,
H A Dunaligned_64.c596 void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr) in handle_lddfmna() argument
650 sun4v_data_access_exception(regs, sfar, sfsr); in handle_lddfmna()
652 spitfire_data_access_exception(regs, sfsr, sfar); in handle_lddfmna()
660 void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr) in handle_stdfmna() argument
701 sun4v_data_access_exception(regs, sfar, sfsr); in handle_stdfmna()
703 spitfire_data_access_exception(regs, sfsr, sfar); in handle_stdfmna()
H A Dkernel.h40 void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr);
41 void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr);
H A Dtraps_64.c187 void spitfire_insn_access_exception(struct pt_regs *regs, unsigned long sfsr, unsigned long sfar) in spitfire_insn_access_exception() argument
197 "SFAR[%016lx], going.\n", sfsr, sfar); in spitfire_insn_access_exception()
209 void spitfire_insn_access_exception_tl1(struct pt_regs *regs, unsigned long sfsr, unsigned long sfa… in spitfire_insn_access_exception_tl1() argument
216 spitfire_insn_access_exception(regs, sfsr, sfar); in spitfire_insn_access_exception_tl1()
290 void spitfire_data_access_exception(struct pt_regs *regs, unsigned long sfsr, unsigned long sfar) in spitfire_data_access_exception() argument
316 "SFAR[%016lx], going.\n", sfsr, sfar); in spitfire_data_access_exception()
328 void spitfire_data_access_exception_tl1(struct pt_regs *regs, unsigned long sfsr, unsigned long sfa… in spitfire_data_access_exception_tl1() argument
335 spitfire_data_access_exception(regs, sfsr, sfar); in spitfire_data_access_exception_tl1()
2613 void mem_address_unaligned(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr) in mem_address_unaligned() argument
H A Dentry.S775 LEON_PI(lda [%l4] ASI_LEON_MMUREGS, %l5) ! read sfsr last
776 SUN_PI_(lda [%l4] ASI_M_MMUREGS, %l5) ! read sfsr last
/openbmc/qemu/target/arm/tcg/
H A Dm_helper.c232 env->v7m.sfsr |= R_V7M_SFSR_LSPERR_MASK; in v7m_stack_write()
237 env->v7m.sfsr |= R_V7M_SFSR_AUVIOL_MASK; in v7m_stack_write()
239 env->v7m.sfsr |= R_V7M_SFSR_SFARVALID_MASK; in v7m_stack_write()
319 env->v7m.sfsr |= R_V7M_SFSR_AUVIOL_MASK | R_V7M_SFSR_SFARVALID_MASK; in v7m_stack_read()
1276 env->v7m.sfsr |= R_V7M_SFSR_LSERR_MASK; in v7m_push_stack()
1532 env->v7m.sfsr |= R_V7M_SFSR_LSERR_MASK; in do_v7m_exception_exit()
1575 env->v7m.sfsr |= R_V7M_SFSR_INVER_MASK; in do_v7m_exception_exit()
1654 env->v7m.sfsr |= R_V7M_SFSR_INVIS_MASK; in do_v7m_exception_exit()
1745 env->v7m.sfsr |= R_V7M_SFSR_LSERR_MASK; in do_v7m_exception_exit()
2006 env->v7m.sfsr |= R_V7M_SFSR_INVEP_MASK; in v7m_read_half_insn()
[all …]
/openbmc/qemu/hw/intc/
H A Darmv7m_nvic.c1488 return cpu->env.v7m.sfsr; in nvic_readl()
2032 cpu->env.v7m.sfsr &= ~value; /* W1C */ in nvic_writel()
2041 cpu->env.v7m.sfsr = value; in nvic_writel()
/openbmc/qemu/target/arm/
H A Dmachine.c721 VMSTATE_UINT32(env.v7m.sfsr, ARMCPU),
H A Dcpu.h550 uint32_t sfsr; /* Secure Fault Status Register */ member