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Searched refs:setbits_be16 (Results 1 – 25 of 27) sorted by relevance

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/openbmc/u-boot/arch/powerpc/include/asm/
H A Diopin_8xx.h35 setbits_be16(datp, 1 << (15 - iopin->pin)); in iopin_set_high()
43 setbits_be16(datp, 1 << (15 - iopin->pin)); in iopin_set_high()
47 setbits_be16(datp, 1 << (15 - iopin->pin)); in iopin_set_high()
129 setbits_be16(dirp, 1 << (15 - iopin->pin)); in iopin_set_out()
137 setbits_be16(dirp, 1 << (15 - iopin->pin)); in iopin_set_out()
141 setbits_be16(dirp, 1 << (15 - iopin->pin)); in iopin_set_out()
223 setbits_be16(odrp, 1 << (15 - iopin->pin)); in iopin_set_odr()
227 setbits_be16(odrp, 1 << (31 - iopin->pin)); in iopin_set_odr()
285 setbits_be16(parp, 1 << (15 - iopin->pin)); in iopin_set_ded()
293 setbits_be16(parp, 1 << (15 - iopin->pin)); in iopin_set_ded()
[all …]
H A Dio.h274 #define setbits_be16(addr, set) setbits(be16, addr, set) macro
/openbmc/u-boot/drivers/serial/
H A Dserial_mpc8xx.c148 setbits_be16(&rtx->txbd.cbd_sc, BD_SC_WRAP); in serial_mpc8xx_probe()
149 setbits_be16(&rtx->rxbd.cbd_sc, BD_SC_EMPTY | BD_SC_WRAP); in serial_mpc8xx_probe()
167 setbits_be16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN); in serial_mpc8xx_probe()
186 setbits_be16(&rtx->txbd.cbd_sc, BD_SC_READY); in serial_mpc8xx_putc()
218 setbits_be16(&rtx->rxbd.cbd_sc, BD_SC_EMPTY); in serial_mpc8xx_getc()
/openbmc/u-boot/drivers/net/
H A Dmpc8xx_fec.c192 setbits_be16(&rtx->txbd[txIdx].cbd_sc, in fec_send()
365 setbits_be16(&immr->im_ioport.iop_pdpar, 0x0080); in fec_pin_init()
376 setbits_be16(&immr->im_ioport.iop_papar, 0xf830); in fec_pin_init()
377 setbits_be16(&immr->im_ioport.iop_padir, 0x0830); in fec_pin_init()
383 setbits_be16(&immr->im_ioport.iop_pcpar, 0x000c); in fec_pin_init()
395 setbits_be16(&immr->im_ioport.iop_papar, 0x1000); in fec_pin_init()
398 setbits_be16(&immr->im_ioport.iop_papar, 0xe810); in fec_pin_init()
399 setbits_be16(&immr->im_ioport.iop_padir, 0x0810); in fec_pin_init()
574 setbits_be16(&rtx->rxbd[PKTBUFSRX - 1].cbd_sc, BD_ENET_RX_WRAP); in fec_init()
586 setbits_be16(&rtx->txbd[TX_BUF_CNT - 1].cbd_sc, BD_ENET_TX_WRAP); in fec_init()
/openbmc/u-boot/arch/m68k/cpu/mcf52x2/
H A Dcpu_init.c130 setbits_be16(&gpio->par_uart, GPIO_PAR_UART_U0TXD | GPIO_PAR_UART_U0RXD); in uart_port_conf()
134 setbits_be16(&gpio->par_uart, GPIO_PAR_UART_U1TXD | GPIO_PAR_UART_U1RXD); in uart_port_conf()
497 setbits_be16(&gpio->par_uart, UART0_ENABLE_MASK); in uart_port_conf()
501 setbits_be16(&gpio->par_uart, UART1_ENABLE_MASK); in uart_port_conf()
505 setbits_be16(&gpio->par_uart, UART2_ENABLE_MASK); in uart_port_conf()
519 setbits_be16(&gpio->par_feci2c, 0x0f00); in fecpin_setclear()
522 setbits_be16(&gpio->par_feci2c, 0x00a0); in fecpin_setclear()
/openbmc/u-boot/arch/m68k/cpu/mcf523x/
H A Dcpu_init.c133 setbits_be16(&gpio->par_uart, in uart_port_conf()
139 setbits_be16(&gpio->par_uart, in uart_port_conf()
146 setbits_be16(&gpio->par_uart, in uart_port_conf()
H A Dcpu.c79 setbits_be16(&wdp->cr, WTM_WCR_HALTED); in watchdog_disable()
/openbmc/u-boot/board/freescale/m54455evb/
H A Dm54455evb.c102 setbits_be16(&gpio->par_feci2c, tmp); in ide_preinit()
104 setbits_be16(&gpio->par_ata, in ide_preinit()
109 setbits_be16(&gpio->par_pci, in ide_preinit()
/openbmc/u-boot/arch/m68k/cpu/mcf532x/
H A Dcpu_init.c108 setbits_be16(&ccm->misccr, CCM_MISCCR_FECM); in cpu_init_r()
303 setbits_be16(&gpio->par_uart, in uart_port_conf()
309 setbits_be16(&gpio->par_uart, in uart_port_conf()
323 setbits_be16(&gpio->par_ssi, in uart_port_conf()
H A Dcpu.c117 setbits_be16(&wdp->cr, WTM_WCR_HALTED); in watchdog_disable()
H A Dspeed.c105 setbits_be16(&ccm->misccr, CCM_MISCCR_LIMP); in clock_limp()
/openbmc/u-boot/arch/m68k/cpu/mcf547x_8x/
H A Dcpu_init.c133 setbits_be16(&gpio->par_feci2cirq, 0xf000); in fecpin_setclear()
135 setbits_be16(&gpio->par_feci2cirq, 0x0fc0); in fecpin_setclear()
/openbmc/u-boot/arch/m68k/cpu/mcf5445x/
H A Dcpu_init.c352 setbits_be16(&gpio->par_ssi, in uart_port_conf()
383 setbits_be16(&gpio->par_feci2c, in fecpin_setclear()
387 setbits_be16(&gpio->par_feci2c, in fecpin_setclear()
391 setbits_be16(&gpio->par_feci2c, in fecpin_setclear()
H A Dspeed.c49 setbits_be16(&ccm->misccr, CCM_MISCCR_LIMP); in clock_enter_limp()
104 setbits_be16(&ccm->misccr2, 0x02); in setup_5441x_clocks()
/openbmc/u-boot/arch/m68k/cpu/mcf5227x/
H A Dcpu_init.c123 setbits_be16(&gpio->par_uart, in uart_port_conf()
129 setbits_be16(&gpio->par_uart, in uart_port_conf()
H A Dspeed.c47 setbits_be16(&ccm->misccr, CCM_MISCCR_LIMP); in clock_enter_limp()
/openbmc/u-boot/board/cssi/MCR3000/
H A Dnand.c55 setbits_be16(&immr->im_ioport.iop_pddir, 0x1c00); in board_nand_init()
/openbmc/u-boot/board/freescale/m54418twr/
H A Dm54418twr.c55 setbits_be16(&ccm->misccr2, CCM_MISCCR2_DDR2CLK); in dram_init()
/openbmc/u-boot/arch/sandbox/include/asm/
H A Dio.h101 #define setbits_be16(addr, set) setbits(be16, addr, set) macro
157 #define setbits_be16(addr, set) setbits(be16, addr, set) macro
/openbmc/u-boot/arch/nios2/include/asm/
H A Dio.h157 #define setbits_be16(addr, set) setbits(be16, addr, set) macro
/openbmc/u-boot/arch/arc/include/asm/
H A Dio.h269 #define setbits_be16(addr, set) setbits(be16, addr, set) macro
/openbmc/u-boot/arch/m68k/include/asm/
H A Dio.h236 #define setbits_be16(addr, set) setbits(be16, addr, set) macro
/openbmc/u-boot/arch/sh/include/asm/
H A Dio.h223 #define setbits_be16(addr, set) setbits(be16, addr, set) macro
/openbmc/u-boot/arch/x86/include/asm/
H A Dio.h120 #define setbits_be16(addr, set) setbits(be16, addr, set) macro
/openbmc/u-boot/arch/nds32/include/asm/
H A Dio.h201 #define setbits_be16(addr, set) setbits(be16, addr, set) macro

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