Searched refs:set_idx (Results 1 – 7 of 7) sorted by relevance
/openbmc/qemu/hw/gpio/ |
H A D | aspeed_gpio.c | 352 static bool aspeed_gpio_get_pin_level(AspeedGPIOState *s, uint32_t set_idx, in aspeed_gpio_get_pin_level() argument 358 reg_val = s->sets[set_idx].data_value; in aspeed_gpio_get_pin_level() 363 static void aspeed_gpio_set_pin_level(AspeedGPIOState *s, uint32_t set_idx, in aspeed_gpio_set_pin_level() argument 366 uint32_t value = s->sets[set_idx].data_value; in aspeed_gpio_set_pin_level() 375 aspeed_gpio_update(s, &s->sets[set_idx], value, in aspeed_gpio_set_pin_level() 376 ~s->sets[set_idx].direction); in aspeed_gpio_set_pin_level() 602 if (reg->set_idx >= agc->nr_gpio_sets) { in aspeed_gpio_read() 608 set = &s->sets[reg->set_idx]; in aspeed_gpio_read() 672 uint32_t set_idx = reg_idx_number / ASPEED_GPIOS_PER_SET; in aspeed_gpio_write_index_mode() local 678 set = &s->sets[set_idx]; in aspeed_gpio_write_index_mode() [all …]
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/openbmc/qemu/contrib/plugins/ |
H A D | cache.c | 150 static void lru_update_blk(Cache *cache, int set_idx, int blk_idx) in lru_update_blk() argument 152 CacheSet *set = &cache->sets[set_idx]; in lru_update_blk() 153 set->lru_priorities[blk_idx] = cache->sets[set_idx].lru_gen_counter; in lru_update_blk() 157 static int lru_get_lru_block(Cache *cache, int set_idx) in lru_get_lru_block() argument 161 min_priority = cache->sets[set_idx].lru_priorities[0]; in lru_get_lru_block() 165 if (cache->sets[set_idx].lru_priorities[i] < min_priority) { in lru_get_lru_block() 166 min_priority = cache->sets[set_idx].lru_priorities[i]; in lru_get_lru_block()
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/openbmc/linux/drivers/pci/controller/ |
H A D | pcie-mediatek-gen3.c | 530 int i, hwirq, set_idx; in mtk_msi_bottom_domain_alloc() local 542 set_idx = hwirq / PCIE_MSI_IRQS_PER_SET; in mtk_msi_bottom_domain_alloc() 543 msi_set = &pcie->msi_sets[set_idx]; in mtk_msi_bottom_domain_alloc() 709 static void mtk_pcie_msi_handler(struct mtk_gen3_pcie *pcie, int set_idx) in mtk_pcie_msi_handler() argument 711 struct mtk_msi_set *msi_set = &pcie->msi_sets[set_idx]; in mtk_pcie_msi_handler() 725 hwirq = bit + set_idx * PCIE_MSI_IRQS_PER_SET; in mtk_pcie_msi_handler()
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/openbmc/qemu/include/hw/gpio/ |
H A D | aspeed_gpio.h | 68 uint16_t set_idx; member
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/openbmc/qemu/hw/hyperv/ |
H A D | hyperv.c | 353 unsigned set_idx; in hyperv_set_event_flag() local 362 set_idx = BIT_WORD(eventno); in hyperv_set_event_flag() 366 if ((qatomic_fetch_or(&flags[set_idx], set_mask) & set_mask) != set_mask) { in hyperv_set_event_flag()
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/openbmc/linux/fs/f2fs/ |
H A D | node.c | 3111 nid_t set_idx = 0; in f2fs_flush_nat_entries() local 3141 set_idx, NAT_VEC_SIZE, setvec))) { in f2fs_flush_nat_entries() 3144 set_idx = setvec[found - 1]->set + 1; in f2fs_flush_nat_entries()
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/openbmc/linux/drivers/staging/rtl8723bs/core/ |
H A D | rtw_mlme_ext.c | 5467 int set_idx; in rtw_scan_ch_decision() local 5477 set_idx = rtw_ch_set_search_ch(pmlmeext->channel_set, in[i].hw_value); in rtw_scan_ch_decision() 5479 && set_idx >= 0 in rtw_scan_ch_decision() 5490 if (pmlmeext->channel_set[set_idx].ScanType == SCAN_PASSIVE) in rtw_scan_ch_decision()
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