| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_init.c | 61 .set_drr = dcn10_set_drr,
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| H A D | dcn10_hw_sequencer.c | 1054 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn10_reset_back_end_for_pipe()
1055 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn10_reset_back_end_for_pipe()
3143 if (pipe_ctx[i]->stream_res.tg->funcs->set_drr) in dcn10_set_drr()
3144 pipe_ctx[i]->stream_res.tg->funcs->set_drr( in dcn10_set_drr()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_init.c | 63 .set_drr = dcn10_set_drr,
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| H A D | dcn201_optc.c | 168 .set_drr = optc1_set_drr,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/ |
| H A D | dcn301_init.c | 69 .set_drr = dcn10_set_drr,
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| H A D | dcn301_optc.c | 142 .set_drr = optc301_set_drr,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| H A D | dcn21_init.c | 64 .set_drr = dcn10_set_drr,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_init.c | 64 .set_drr = dcn10_set_drr,
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| H A D | dcn20_optc.c | 546 .set_drr = optc1_set_drr,
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| H A D | dcn20_hwseq.c | 791 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn20_enable_stream_timing()
792 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn20_enable_stream_timing()
2540 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn20_reset_back_end_for_pipe()
2541 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn20_reset_back_end_for_pipe()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_init.c | 68 .set_drr = dcn10_set_drr,
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| H A D | dcn31_optc.c | 266 .set_drr = optc31_set_drr,
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| H A D | dcn31_hwseq.c | 529 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn31_reset_back_end_for_pipe()
530 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn31_reset_back_end_for_pipe()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_init.c | 65 .set_drr = dcn10_set_drr,
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| H A D | dcn30_optc.c | 350 .set_drr = optc1_set_drr,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_init.c | 70 .set_drr = dcn10_set_drr,
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| H A D | dcn314_optc.c | 228 .set_drr = optc31_set_drr,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_init.c | 66 .set_drr = dcn10_set_drr,
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| H A D | dcn32_optc.c | 302 .set_drr = optc32_set_drr,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce80/ |
| H A D | dce80_timing_generator.c | 211 .set_drr = dce110_timing_generator_set_drr,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| H A D | dce60_timing_generator.c | 230 .set_drr = dce110_timing_generator_set_drr,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | timing_generator.h | 238 void (*set_drr)(struct timing_generator *tg, const struct drr_params *params); member
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_hw_sequencer.c | 1555 if (pipe_ctx->stream_res.tg->funcs->set_drr) in apply_single_controller_ctx_to_hw()
1556 pipe_ctx->stream_res.tg->funcs->set_drr( in apply_single_controller_ctx_to_hw()
1910 static void set_drr(struct pipe_ctx **pipe_ctx, in set_drr() function
1928 pipe_ctx[i]->stream_res.tg->funcs->set_drr( in set_drr()
3160 .set_drr = set_drr,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | hw_sequencer.h | 249 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, member
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| H A D | dce120_timing_generator.c | 1192 .set_drr = dce120_timing_generator_set_drr,
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