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Searched refs:scdr (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/mach-at91/
H A Dclock.c66 writel(sys_clk, &pmc->scdr); in at91_system_clk_disable()
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_pio.h75 u32 scdr; /* 0x8C SCLK Divider Debouncing Register */ member
H A Dat91_pmc.h30 u32 scdr; /* 0x04 System Clock Disable Register */ member
/openbmc/u-boot/drivers/pinctrl/
H A Dpinctrl-at91.c180 writel(div & PIO_SCDR_DIV, &pio->mux.pio3.scdr); in at91_mux_pio3_set_debounce()
/openbmc/u-boot/drivers/gpio/
H A Dat91_gpio.c332 writel(div & PIO_SCDR_DIV, &at91_port->mux.pio3.scdr); in at91_pio3_set_pio_debounce()