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/openbmc/qemu/tests/qtest/
H A Dam53c974-test.c17 QTestState *s = qtest_init( in test_cmdfifo_underflow_ok() local
21 qtest_outl(s, 0xcf8, 0x80001004); in test_cmdfifo_underflow_ok()
22 qtest_outw(s, 0xcfc, 0x01); in test_cmdfifo_underflow_ok()
23 qtest_outl(s, 0xcf8, 0x8000100e); in test_cmdfifo_underflow_ok()
24 qtest_outl(s, 0xcfc, 0x8a000000); in test_cmdfifo_underflow_ok()
25 qtest_outl(s, 0x8a09, 0x42000000); in test_cmdfifo_underflow_ok()
26 qtest_outl(s, 0x8a0d, 0x00); in test_cmdfifo_underflow_ok()
27 qtest_outl(s, 0x8a0b, 0x1000); in test_cmdfifo_underflow_ok()
28 qtest_quit(s); in test_cmdfifo_underflow_ok()
34 QTestState *s = qtest_init( in test_cmdfifo_underflow2_ok() local
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H A Dfuzz-sdcard-test.c19 QTestState *s; in oss_fuzz_29225() local
21 s = qtest_init(" -m 512m -nodefaults -nographic" in oss_fuzz_29225()
26 qtest_outl(s, 0xcf8, 0x80001010); in oss_fuzz_29225()
27 qtest_outl(s, 0xcfc, 0xd0690); in oss_fuzz_29225()
28 qtest_outl(s, 0xcf8, 0x80001003); in oss_fuzz_29225()
29 qtest_outl(s, 0xcf8, 0x80001013); in oss_fuzz_29225()
30 qtest_outl(s, 0xcfc, 0xffffffff); in oss_fuzz_29225()
31 qtest_outl(s, 0xcf8, 0x80001003); in oss_fuzz_29225()
32 qtest_outl(s, 0xcfc, 0x3effe00); in oss_fuzz_29225()
34 qtest_bufwrite(s, 0xff0d062c, "\xff", 0x1); in oss_fuzz_29225()
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H A Dfuzz-lsi53c895a-test.c19 QTestState *s; in test_lsi_dma_reentrancy() local
21 s = qtest_init("-M q35 -m 512M -nodefaults " in test_lsi_dma_reentrancy()
25 qtest_outl(s, 0xcf8, 0x80000804); /* PCI Command Register */ in test_lsi_dma_reentrancy()
26 qtest_outw(s, 0xcfc, 0x7); /* Enables accesses */ in test_lsi_dma_reentrancy()
27 qtest_outl(s, 0xcf8, 0x80000814); /* Memory Bar 1 */ in test_lsi_dma_reentrancy()
28 qtest_outl(s, 0xcfc, 0xff100000); /* Set MMIO Address*/ in test_lsi_dma_reentrancy()
29 qtest_outl(s, 0xcf8, 0x80000818); /* Memory Bar 2 */ in test_lsi_dma_reentrancy()
30 qtest_outl(s, 0xcfc, 0xff000000); /* Set RAM Address*/ in test_lsi_dma_reentrancy()
31 qtest_writel(s, 0xff000000, 0xc0000024); in test_lsi_dma_reentrancy()
32 qtest_writel(s, 0xff000114, 0x00000080); in test_lsi_dma_reentrancy()
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/openbmc/qemu/hw/audio/
H A Dsb16.c172 static void speaker (SB16State *s, int on) in speaker() argument
174 s->speaker = on; in speaker()
178 static void control (SB16State *s, int hold) in control() argument
180 int dma = s->use_hdma ? s->hdma : s->dma; in control()
181 IsaDma *isa_dma = s->use_hdma ? s->isa_hdma : s->isa_dma; in control()
183 s->dma_running = hold; in control()
185 ldebug ("hold %d high %d dma %d\n", hold, s->use_hdma, dma); in control()
189 AUD_set_active_out (s->voice, 1); in control()
193 AUD_set_active_out (s->voice, 0); in control()
199 SB16State *s = opaque; in aux_timer() local
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H A Dwm8750.c70 static inline void wm8750_in_load(WM8750State *s) in wm8750_in_load() argument
72 if (s->idx_in + s->req_in <= sizeof(s->data_in)) in wm8750_in_load()
74 s->idx_in = MAX(0, (int) sizeof(s->data_in) - s->req_in); in wm8750_in_load()
75 AUD_read(*s->in[0], s->data_in + s->idx_in, in wm8750_in_load()
76 sizeof(s->data_in) - s->idx_in); in wm8750_in_load()
79 static inline void wm8750_out_flush(WM8750State *s) in wm8750_out_flush() argument
82 while (sent < s->idx_out) in wm8750_out_flush()
83 sent += AUD_write(*s->out[0], s->data_out + sent, s->idx_out - sent) in wm8750_out_flush()
84 ?: s->idx_out; in wm8750_out_flush()
85 s->idx_out = 0; in wm8750_out_flush()
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/openbmc/qemu/hw/scsi/
H A Desp.c46 static void esp_raise_irq(ESPState *s) in esp_raise_irq() argument
48 if (!(s->rregs[ESP_RSTAT] & STAT_INT)) { in esp_raise_irq()
49 s->rregs[ESP_RSTAT] |= STAT_INT; in esp_raise_irq()
50 qemu_irq_raise(s->irq); in esp_raise_irq()
55 static void esp_lower_irq(ESPState *s) in esp_lower_irq() argument
57 if (s->rregs[ESP_RSTAT] & STAT_INT) { in esp_lower_irq()
58 s->rregs[ESP_RSTAT] &= ~STAT_INT; in esp_lower_irq()
59 qemu_irq_lower(s->irq); in esp_lower_irq()
64 static void esp_raise_drq(ESPState *s) in esp_raise_drq() argument
66 if (!(s->drq_state)) { in esp_raise_drq()
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H A Dlsi53c895a.c332 static inline int lsi_irq_on_rsl(LSIState *s) in lsi_irq_on_rsl() argument
334 return (s->sien0 & LSI_SIST0_RSL) && (s->scid & LSI_SCID_RRE); in lsi_irq_on_rsl()
337 static lsi_request *get_pending_req(LSIState *s) in get_pending_req() argument
341 QTAILQ_FOREACH(p, &s->queue, next) { in get_pending_req()
349 static void lsi_soft_reset(LSIState *s) in lsi_soft_reset() argument
352 s->carry = 0; in lsi_soft_reset()
354 s->msg_action = LSI_MSG_ACTION_COMMAND; in lsi_soft_reset()
355 s->msg_len = 0; in lsi_soft_reset()
356 s->waiting = LSI_NOWAIT; in lsi_soft_reset()
357 s->dsa = 0; in lsi_soft_reset()
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/openbmc/qemu/hw/ide/
H A Dcore.c82 static void ide_dummy_transfer_stop(IDEState *s);
113 static void ide_identify_size(IDEState *s) in ide_identify_size() argument
115 uint16_t *p = (uint16_t *)s->identify_data; in ide_identify_size()
116 int64_t nb_sectors_lba28 = s->nb_sectors; in ide_identify_size()
122 put_le16(p + 100, s->nb_sectors); in ide_identify_size()
123 put_le16(p + 101, s->nb_sectors >> 16); in ide_identify_size()
124 put_le16(p + 102, s->nb_sectors >> 32); in ide_identify_size()
125 put_le16(p + 103, s->nb_sectors >> 48); in ide_identify_size()
128 static void ide_identify(IDEState *s) in ide_identify() argument
132 IDEDevice *dev = s->unit ? s->bus->slave : s->bus->master; in ide_identify()
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/openbmc/linux/arch/arm64/crypto/
H A Dsm4-ce-asm.h12 sm4e b0.4s, v24.4s; \
13 sm4e b0.4s, v25.4s; \
14 sm4e b0.4s, v26.4s; \
15 sm4e b0.4s, v27.4s; \
16 sm4e b0.4s, v28.4s; \
17 sm4e b0.4s, v29.4s; \
18 sm4e b0.4s, v30.4s; \
19 sm4e b0.4s, v31.4s; \
20 rev64 b0.4s, b0.4s; \
29 sm4e b0.4s, v24.4s; \
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/openbmc/qemu/hw/i2c/
H A Domap_i2c.c61 static void omap_i2c_interrupts_update(OMAPI2CState *s) in omap_i2c_interrupts_update() argument
63 qemu_set_irq(s->irq, s->stat & s->mask); in omap_i2c_interrupts_update()
64 if ((s->dma >> 15) & 1) /* RDMA_EN */ in omap_i2c_interrupts_update()
65 qemu_set_irq(s->drq[0], (s->stat >> 3) & 1); /* RRDY */ in omap_i2c_interrupts_update()
66 if ((s->dma >> 7) & 1) /* XDMA_EN */ in omap_i2c_interrupts_update()
67 qemu_set_irq(s->drq[1], (s->stat >> 4) & 1); /* XRDY */ in omap_i2c_interrupts_update()
70 static void omap_i2c_fifo_run(OMAPI2CState *s) in omap_i2c_fifo_run() argument
74 if (!i2c_bus_busy(s->bus)) in omap_i2c_fifo_run()
77 if ((s->control >> 2) & 1) { /* RM */ in omap_i2c_fifo_run()
78 if ((s->control >> 1) & 1) { /* STP */ in omap_i2c_fifo_run()
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H A Dpm_smbus.c68 static void smb_transaction(PMSMBus *s) in smb_transaction() argument
70 uint8_t prot = (s->smb_ctl >> 2) & 0x07; in smb_transaction()
71 uint8_t read = s->smb_addr & 0x01; in smb_transaction()
72 uint8_t cmd = s->smb_cmd; in smb_transaction()
73 uint8_t addr = s->smb_addr >> 1; in smb_transaction()
74 I2CBus *bus = s->smbus; in smb_transaction()
79 if ((s->smb_stat & STS_DEV_ERR) != 0) { in smb_transaction()
100 ret = smbus_write_byte(bus, addr, cmd, s->smb_data0); in smb_transaction()
110 (s->smb_data1 << 8) | s->smb_data0); in smb_transaction()
126 ret = i2c_send(bus, s->smb_data1); in smb_transaction()
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H A Dnpcm7xx_smbus.c164 #define NPCM7XX_SMBUS_ENABLED(s) ((s)->ctl2 & NPCM7XX_SMBCTL2_ENABLE) argument
165 #define NPCM7XX_SMBUS_FIFO_ENABLED(s) ((s)->fif_ctl & \ argument
200 static void npcm7xx_smbus_update_irq(NPCM7xxSMBusState *s) in npcm7xx_smbus_update_irq() argument
204 if (s->ctl1 & NPCM7XX_SMBCTL1_INTEN) { in npcm7xx_smbus_update_irq()
205 level = !!((s->ctl1 & NPCM7XX_SMBCTL1_NMINTE && in npcm7xx_smbus_update_irq()
206 s->st & NPCM7XX_SMBST_NMATCH) || in npcm7xx_smbus_update_irq()
207 (s->st & NPCM7XX_SMBST_BER) || in npcm7xx_smbus_update_irq()
208 (s->st & NPCM7XX_SMBST_NEGACK) || in npcm7xx_smbus_update_irq()
209 (s->st & NPCM7XX_SMBST_SDAST) || in npcm7xx_smbus_update_irq()
210 (s->ctl1 & NPCM7XX_SMBCTL1_STASTRE && in npcm7xx_smbus_update_irq()
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/openbmc/qemu/hw/arm/
H A Domap1.c206 struct omap_mpu_timer_s *s = opaque; in omap_mpu_timer_read() local
214 return (s->enable << 5) | (s->ptv << 2) | (s->ar << 1) | s->st; in omap_mpu_timer_read()
220 return omap_timer_read(s); in omap_mpu_timer_read()
230 struct omap_mpu_timer_s *s = opaque; in omap_mpu_timer_write() local
239 omap_timer_sync(s); in omap_mpu_timer_write()
240 s->enable = (value >> 5) & 1; in omap_mpu_timer_write()
241 s->ptv = (value >> 2) & 7; in omap_mpu_timer_write()
242 s->ar = (value >> 1) & 1; in omap_mpu_timer_write()
243 s->st = value & 1; in omap_mpu_timer_write()
244 omap_timer_update(s); in omap_mpu_timer_write()
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/openbmc/qemu/hw/display/
H A Dcirrus_vga.c180 typedef void (*cirrus_fill_t)(struct CirrusVGAState *s,
201 static void cirrus_bitblt_reset(CirrusVGAState *s);
202 static void cirrus_update_memory_access(CirrusVGAState *s);
210 static bool blit_region_is_unsafe(struct CirrusVGAState *s, in blit_region_is_unsafe() argument
218 + ((int64_t)s->cirrus_blt_height - 1) * pitch in blit_region_is_unsafe()
219 - s->cirrus_blt_width; in blit_region_is_unsafe()
220 if (min < -1 || addr >= s->vga.vram_size) { in blit_region_is_unsafe()
225 + ((int64_t)s->cirrus_blt_height-1) * pitch in blit_region_is_unsafe()
226 + s->cirrus_blt_width; in blit_region_is_unsafe()
227 if (max > s->vga.vram_size) { in blit_region_is_unsafe()
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/openbmc/qemu/hw/net/
H A Dlan9118.c344 static void lan9118_update(lan9118_state *s) in lan9118_update() argument
349 level = (s->int_sts & s->int_en) != 0; in lan9118_update()
351 s->irq_cfg |= IRQ_INT; in lan9118_update()
353 s->irq_cfg &= ~IRQ_INT; in lan9118_update()
355 if ((s->irq_cfg & IRQ_EN) == 0) { in lan9118_update()
358 if ((s->irq_cfg & (IRQ_TYPE | IRQ_POL)) != (IRQ_TYPE | IRQ_POL)) { in lan9118_update()
364 qemu_set_irq(s->irq, level); in lan9118_update()
367 static void lan9118_mac_changed(lan9118_state *s) in lan9118_mac_changed() argument
369 qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a); in lan9118_mac_changed()
372 static void lan9118_reload_eeprom(lan9118_state *s) in lan9118_reload_eeprom() argument
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H A Ddp8393x.c150 static uint32_t dp8393x_cdp(dp8393xState *s) in dp8393x_cdp() argument
152 return (s->regs[SONIC_URRA] << 16) | s->regs[SONIC_CDP]; in dp8393x_cdp()
155 static uint32_t dp8393x_crba(dp8393xState *s) in dp8393x_crba() argument
157 return (s->regs[SONIC_CRBA1] << 16) | s->regs[SONIC_CRBA0]; in dp8393x_crba()
160 static uint32_t dp8393x_crda(dp8393xState *s) in dp8393x_crda() argument
162 return (s->regs[SONIC_URDA] << 16) | in dp8393x_crda()
163 (s->regs[SONIC_CRDA] & SONIC_DESC_ADDR); in dp8393x_crda()
166 static uint32_t dp8393x_rbwc(dp8393xState *s) in dp8393x_rbwc() argument
168 return (s->regs[SONIC_RBWC1] << 16) | s->regs[SONIC_RBWC0]; in dp8393x_rbwc()
171 static uint32_t dp8393x_rrp(dp8393xState *s) in dp8393x_rrp() argument
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/openbmc/linux/lib/zlib_deflate/
H A Ddeflate.c69 typedef block_state (*compress_func) (deflate_state *s, int flush);
72 static void fill_window (deflate_state *s);
73 static block_state deflate_stored (deflate_state *s, int flush);
74 static block_state deflate_fast (deflate_state *s, int flush);
75 static block_state deflate_slow (deflate_state *s, int flush);
76 static void lm_init (deflate_state *s);
77 static void putShortMSB (deflate_state *s, uInt b);
79 static uInt longest_match (deflate_state *s, IPos cur_match);
82 static void check_match (deflate_state *s, IPos start, IPos match,
163 #define UPDATE_HASH(s,h,c) (h = (((h)<<s->hash_shift) ^ (c)) & s->hash_mask) argument
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/openbmc/qemu/hw/char/
H A Dserial.c106 static void serial_xmit(SerialState *s);
108 static inline void recv_fifo_put(SerialState *s, uint8_t chr) in recv_fifo_put() argument
111 if (!fifo8_is_full(&s->recv_fifo)) { in recv_fifo_put()
112 fifo8_push(&s->recv_fifo, chr); in recv_fifo_put()
114 s->lsr |= UART_LSR_OE; in recv_fifo_put()
118 static void serial_update_irq(SerialState *s) in serial_update_irq() argument
122 if ((s->ier & UART_IER_RLSI) && (s->lsr & UART_LSR_INT_ANY)) { in serial_update_irq()
124 } else if ((s->ier & UART_IER_RDI) && s->timeout_ipending) { in serial_update_irq()
129 } else if ((s->ier & UART_IER_RDI) && (s->lsr & UART_LSR_DR) && in serial_update_irq()
130 (!(s->fcr & UART_FCR_FE) || in serial_update_irq()
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/openbmc/qemu/hw/block/
H A Dm25p80.c536 static inline Manufacturer get_man(Flash *s) in OBJECT_DECLARE_TYPE()
538 switch (s->pi->id[0]) { in OBJECT_DECLARE_TYPE()
569 static void flash_sync_page(Flash *s, int page) in flash_sync_page() argument
573 if (!s->blk || !blk_is_writable(s->blk)) { in flash_sync_page()
579 qemu_iovec_add(iov, s->storage + page * s->pi->page_size, in flash_sync_page()
580 s->pi->page_size); in flash_sync_page()
581 blk_aio_pwritev(s->blk, page * s->pi->page_size, iov, 0, in flash_sync_page()
585 static inline void flash_sync_area(Flash *s, int64_t off, int64_t len) in flash_sync_area() argument
589 if (!s->blk || !blk_is_writable(s->blk)) { in flash_sync_area()
596 qemu_iovec_add(iov, s->storage + off, len); in flash_sync_area()
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/openbmc/qemu/hw/sd/
H A Dsdhci.c50 static inline unsigned int sdhci_get_fifolen(SDHCIState *s) in DECLARE_INSTANCE_CHECKER()
52 return 1 << (9 + FIELD_EX32(s->capareg, SDHC_CAPAB, MAXBLOCKLENGTH)); in DECLARE_INSTANCE_CHECKER()
56 static bool sdhci_check_capab_freq_range(SDHCIState *s, const char *desc, in sdhci_check_capab_freq_range() argument
59 if (s->sd_spec_version >= 3) { in sdhci_check_capab_freq_range()
74 static void sdhci_check_capareg(SDHCIState *s, Error **errp) in sdhci_check_capareg() argument
76 uint64_t msk = s->capareg; in sdhci_check_capareg()
80 switch (s->sd_spec_version) { in sdhci_check_capareg()
82 val = FIELD_EX64(s->capareg, SDHC_CAPAB, BUS64BIT_V4); in sdhci_check_capareg()
86 val = FIELD_EX64(s->capareg, SDHC_CAPAB, UHS_II); in sdhci_check_capareg()
90 val = FIELD_EX64(s->capareg, SDHC_CAPAB, ADMA3); in sdhci_check_capareg()
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/openbmc/u-boot/lib/zlib/
H A Ddeflate.c73 typedef block_state (*compress_func) OF((deflate_state *s, int flush));
76 local void fill_window OF((deflate_state *s));
77 local block_state deflate_stored OF((deflate_state *s, int flush));
78 local block_state deflate_fast OF((deflate_state *s, int flush));
80 local block_state deflate_slow OF((deflate_state *s, int flush));
82 local block_state deflate_rle OF((deflate_state *s, int flush));
83 local block_state deflate_huff OF((deflate_state *s, int flush));
84 local void lm_init OF((deflate_state *s));
85 local void putShortMSB OF((deflate_state *s, uInt b));
90 uInt longest_match OF((deflate_state *s, IPos cur_match));
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/openbmc/qemu/hw/ssi/
H A Dpnv_spi.c70 static bool does_rdr_match(PnvSpi *s) in does_rdr_match() argument
77 s->regs[SPI_MM_REG]); in does_rdr_match()
79 s->regs[SPI_MM_REG]); in does_rdr_match()
82 GETFIELD(PPC_BITMASK(48, 63), s->regs[SPI_RCV_DATA_REG]))) { in does_rdr_match()
88 static uint8_t get_from_offset(PnvSpi *s, uint8_t offset) in get_from_offset() argument
97 byte = (s->regs[SPI_XMIT_DATA_REG] >> (56 - offset * 8)) & 0xFF; in get_from_offset()
110 static uint8_t read_from_frame(PnvSpi *s, uint8_t *read_buf, uint8_t nr_bytes, in read_from_frame() argument
124 s->regs[SPI_RCV_DATA_REG] = (s->regs[SPI_RCV_DATA_REG] << 8) | byte; in read_from_frame()
131 static void spi_response(PnvSpi *s, int bits, PnvXferBuffer *rsp_payload) in spi_response() argument
147 if (rsp_payload->len != (s->N1_bytes + s->N2_bytes)) { in spi_response()
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/openbmc/linux/arch/m68k/ifpsp060/
H A DMISC34 freal.s : 2.4
36 x_fovfl.s : 2.16
37 x_funfl.s : 2.19
38 x_funsupp.s : 2.27
39 x_effadd.s : 2.21
40 x_foperr.s : 2.9
41 x_fsnan.s : 2.12
42 x_finex.s : 2.14
43 x_fdz.s : 2.5
44 x_fline.s : 2.5
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/openbmc/linux/lib/xz/
H A Dxz_dec_stream.c157 static bool fill_temp(struct xz_dec *s, struct xz_buf *b) in fill_temp() argument
160 b->in_size - b->in_pos, s->temp.size - s->temp.pos); in fill_temp()
162 memcpy(s->temp.buf + s->temp.pos, b->in + b->in_pos, copy_size); in fill_temp()
164 s->temp.pos += copy_size; in fill_temp()
166 if (s->temp.pos == s->temp.size) { in fill_temp()
167 s->temp.pos = 0; in fill_temp()
175 static enum xz_ret dec_vli(struct xz_dec *s, const uint8_t *in, in dec_vli() argument
180 if (s->pos == 0) in dec_vli()
181 s->vli = 0; in dec_vli()
187 s->vli |= (vli_type)(byte & 0x7F) << s->pos; in dec_vli()
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/openbmc/qemu/hw/core/
H A Dptimer.c46 static void ptimer_trigger(ptimer_state *s) in ptimer_trigger() argument
48 s->callback(s->callback_opaque); in ptimer_trigger()
51 static void ptimer_reload(ptimer_state *s, int delta_adjust) in ptimer_reload() argument
65 (s->policy_mask & PTIMER_POLICY_TRIGGER_ONLY_ON_DECREMENT)) { in ptimer_reload()
68 if (s->delta == 0 && !(s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER) in ptimer_reload()
70 ptimer_trigger(s); in ptimer_reload()
78 delta = s->delta; in ptimer_reload()
79 period = s->period; in ptimer_reload()
80 period_frac = s->period_frac; in ptimer_reload()
82 if (delta == 0 && !(s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_RELOAD)) { in ptimer_reload()
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