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Searched refs:rz_mtu3_8bit_ch_write (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/pwm/
H A Dpwm-rz-mtu3.c230 rz_mtu3_8bit_ch_write(priv->mtu, RZ_MTU3_TMDR1, RZ_MTU3_TMDR1_MD_PWMMODE1); in rz_mtu3_pwm_enable()
232 rz_mtu3_8bit_ch_write(priv->mtu, RZ_MTU3_TIORH, val); in rz_mtu3_pwm_enable()
234 rz_mtu3_8bit_ch_write(priv->mtu, RZ_MTU3_TIORL, val); in rz_mtu3_pwm_enable()
257 rz_mtu3_8bit_ch_write(priv->mtu, RZ_MTU3_TIORH, RZ_MTU3_TIOR_OC_RETAIN); in rz_mtu3_pwm_disable()
259 rz_mtu3_8bit_ch_write(priv->mtu, RZ_MTU3_TIORL, RZ_MTU3_TIOR_OC_RETAIN); in rz_mtu3_pwm_disable()
377 rz_mtu3_8bit_ch_write(priv->mtu, RZ_MTU3_TCR, in rz_mtu3_pwm_config()
382 rz_mtu3_8bit_ch_write(priv->mtu, RZ_MTU3_TCR, in rz_mtu3_pwm_config()
/openbmc/linux/drivers/counter/
H A Drz-mtu3-cnt.c283 rz_mtu3_8bit_ch_write(ch, RZ_MTU3_TMDR1, timer_mode); in rz_mtu3_count_function_write()
386 rz_mtu3_8bit_ch_write(ch, RZ_MTU3_TCR, RZ_MTU3_TCR_CCLR_TGRA); in rz_mtu3_count_ceiling_write()
399 rz_mtu3_8bit_ch_write(ch1, RZ_MTU3_TMDR1, RZ_MTU3_TMDR1_PH_CNT_MODE_1); in rz_mtu3_32bit_cnt_setting()
401 rz_mtu3_8bit_ch_write(ch1, RZ_MTU3_TCR, RZ_MTU3_TCR_CCLR_TGRA); in rz_mtu3_32bit_cnt_setting()
402 rz_mtu3_8bit_ch_write(ch1, RZ_MTU3_TIOR, RZ_MTU3_TIOR_IC_BOTH); in rz_mtu3_32bit_cnt_setting()
413 rz_mtu3_8bit_ch_write(ch, RZ_MTU3_TMDR1, RZ_MTU3_TMDR1_PH_CNT_MODE_1); in rz_mtu3_16bit_cnt_setting()
415 rz_mtu3_8bit_ch_write(ch, RZ_MTU3_TCR, RZ_MTU3_TCR_CCLR_TGRA); in rz_mtu3_16bit_cnt_setting()
416 rz_mtu3_8bit_ch_write(ch, RZ_MTU3_TIOR, RZ_MTU3_TIOR_NO_OUTPUT); in rz_mtu3_16bit_cnt_setting()
/openbmc/linux/include/linux/mfd/
H A Drz-mtu3.h184 void rz_mtu3_8bit_ch_write(struct rz_mtu3_channel *ch, u16 off, u8 val);
/openbmc/linux/drivers/mfd/
H A Drz-mtu3.c120 void rz_mtu3_8bit_ch_write(struct rz_mtu3_channel *ch, u16 offset, u8 val) in rz_mtu3_8bit_ch_write() function
129 EXPORT_SYMBOL_GPL(rz_mtu3_8bit_ch_write);