Home
last modified time | relevance | path

Searched refs:roce_write (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/infiniband/hw/hns/
H A Dhns_roce_common.h37 #define roce_write(dev, reg, val) writel((val), (dev)->reg_base + (reg)) macro
H A Dhns_roce_hw_v2.c1185 roce_write(hr_dev, ROCEE_TX_CMQ_BASEADDR_L_REG, lower_32_bits(dma)); in init_csq()
1186 roce_write(hr_dev, ROCEE_TX_CMQ_BASEADDR_H_REG, upper_32_bits(dma)); in init_csq()
1187 roce_write(hr_dev, ROCEE_TX_CMQ_DEPTH_REG, in init_csq()
1191 roce_write(hr_dev, ROCEE_TX_CMQ_CI_REG, 0); in init_csq()
1192 roce_write(hr_dev, ROCEE_TX_CMQ_PI_REG, 0); in init_csq()
1295 roce_write(hr_dev, ROCEE_TX_CMQ_PI_REG, csq->head); in __hns_roce_cmq_send()
6097 roce_write(hr_dev, ROCEE_VF_ABN_INT_ST_REG, in abnormal_interrupt_basic()
6110 roce_write(hr_dev, ROCEE_VF_ABN_INT_EN_REG, int_en); in abnormal_interrupt_basic()
6282 roce_write(hr_dev, ROCEE_VF_EVENT_INT_EN_REG + in hns_roce_v2_int_mask_enable()
6285 roce_write(hr_dev, ROCEE_VF_ABN_INT_EN_REG, enable_flag); in hns_roce_v2_int_mask_enable()
[all …]