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Searched refs:rmr (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/acpi/arm64/
H A Diort.c892 struct acpi_iort_rmr *rmr = (struct acpi_iort_rmr *)node->node_data; in iort_get_rmrs() local
897 rmr->rmr_offset); in iort_get_rmrs()
899 iort_rmr_desc_check_overlap(rmr_desc, rmr->rmr_count); in iort_get_rmrs()
901 for (i = 0; i < rmr->rmr_count; i++, rmr_desc++) { in iort_get_rmrs()
906 if (rmr->flags & ACPI_IORT_RMR_REMAP_PERMITTED) in iort_get_rmrs()
911 if (rmr->flags & ACPI_IORT_RMR_ACCESS_PRIVILEGE) in iort_get_rmrs()
915 if (ACPI_IORT_RMR_ACCESS_ATTRIBUTES(rmr->flags) <= in iort_get_rmrs()
918 else if (ACPI_IORT_RMR_ACCESS_ATTRIBUTES(rmr->flags) == in iort_get_rmrs()
982 struct acpi_iort_rmr *rmr; in iort_node_get_rmr_info() local
994 rmr = (struct acpi_iort_rmr *)node->node_data; in iort_node_get_rmr_info()
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/openbmc/linux/arch/powerpc/include/asm/
H A Dmpc5121.h16 u32 rmr; /* Reset Mode Register */ member
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dcpu.c156 immap->reset.rmr = RMR_CSRE; /* Checkstop Reset enable */ in do_reset()
H A Dcpu_init.c229 __raw_writel(RMR_CSRE & (1<<RMR_CSRE_SHIFT), &im->reset.rmr); in cpu_init_f()
/openbmc/linux/drivers/net/ethernet/ibm/emac/
H A Demac.h33 u32 rmr; /* Reset */ member
H A Dcore.c680 out_be32(&p->rmr, r); in emac_configure()
958 u32 rmr = emac_iff2rmr(dev->ndev); in __emac_set_multicast_list() local
960 DBG(dev, "__multicast %08x" NL, rmr); in __emac_set_multicast_list()
981 if (rmr & EMAC_RMR_MAE) in __emac_set_multicast_list()
983 out_be32(&p->rmr, rmr); in __emac_set_multicast_list()
/openbmc/linux/drivers/iommu/arm/arm-smmu/
H A Darm-smmu.c2035 struct iommu_iort_rmr_data *rmr; in arm_smmu_rmr_install_bypass_smr() local
2038 rmr = container_of(e, struct iommu_iort_rmr_data, rr); in arm_smmu_rmr_install_bypass_smr()
2039 for (i = 0; i < rmr->num_sids; i++) { in arm_smmu_rmr_install_bypass_smr()
2040 idx = arm_smmu_find_sme(smmu, rmr->sids[i], ~0); in arm_smmu_rmr_install_bypass_smr()
2045 smmu->smrs[idx].id = rmr->sids[i]; in arm_smmu_rmr_install_bypass_smr()
/openbmc/qemu/target/riscv/
H A Dinsn32.decode57 &rmr vm rd rs2
82 @r2_vm_1 ...... . ..... ..... ... ..... ....... &rmr vm=1 %rs2 %rd
84 @r2_vm ...... vm:1 ..... ..... ... ..... ....... &rmr %rs2 %rd
/openbmc/linux/drivers/iommu/arm/arm-smmu-v3/
H A Darm-smmu-v3.c3780 struct iommu_iort_rmr_data *rmr; in arm_smmu_rmr_install_bypass_ste() local
3783 rmr = container_of(e, struct iommu_iort_rmr_data, rr); in arm_smmu_rmr_install_bypass_ste()
3784 for (i = 0; i < rmr->num_sids; i++) { in arm_smmu_rmr_install_bypass_ste()
3785 ret = arm_smmu_init_sid_strtab(smmu, rmr->sids[i]); in arm_smmu_rmr_install_bypass_ste()
3788 rmr->sids[i]); in arm_smmu_rmr_install_bypass_ste()
3792 step = arm_smmu_get_step_for_sid(smmu, rmr->sids[i]); in arm_smmu_rmr_install_bypass_ste()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dimmap_83xx.h194 u32 rmr; /* Reset Mode Register */ member