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Searched refs:reserved_regs (Results 1 – 12 of 12) sorted by relevance

/openbmc/qemu/tcg/sparc64/
H A Dtcg-target.c.inc968 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
974 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TB);
1660 s->reserved_regs = 0;
1661 tcg_regset_set_reg(s->reserved_regs, TCG_REG_G0); /* zero */
1662 tcg_regset_set_reg(s->reserved_regs, TCG_REG_G6); /* reserved for os */
1663 tcg_regset_set_reg(s->reserved_regs, TCG_REG_G7); /* thread pointer */
1664 tcg_regset_set_reg(s->reserved_regs, TCG_REG_I6); /* frame pointer */
1665 tcg_regset_set_reg(s->reserved_regs, TCG_REG_I7); /* return address */
1666 tcg_regset_set_reg(s->reserved_regs, TCG_REG_O6); /* stack pointer */
1667 tcg_regset_set_reg(s->reserved_regs, TCG_REG_T1); /* for internal use */
[all …]
/openbmc/qemu/tcg/mips/
H A Dtcg-target.c.inc2428 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
2609 s->reserved_regs = 0;
2610 tcg_regset_set_reg(s->reserved_regs, TCG_REG_ZERO); /* zero register */
2611 tcg_regset_set_reg(s->reserved_regs, TCG_REG_K0); /* kernel use only */
2612 tcg_regset_set_reg(s->reserved_regs, TCG_REG_K1); /* kernel use only */
2613 tcg_regset_set_reg(s->reserved_regs, TCG_TMP0); /* internal use */
2614 tcg_regset_set_reg(s->reserved_regs, TCG_TMP1); /* internal use */
2615 tcg_regset_set_reg(s->reserved_regs, TCG_TMP2); /* internal use */
2616 tcg_regset_set_reg(s->reserved_regs, TCG_TMP3); /* internal use */
2617 tcg_regset_set_reg(s->reserved_regs, TCG_REG_RA); /* return address */
[all …]
/openbmc/qemu/tcg/
H A Dtcg.c1370 tcg_debug_assert(!tcg_regset_test_reg(s->reserved_regs, TCG_AREG0)); in tcg_context_init()
1556 tcg_regset_set_reg(s->reserved_regs, reg); in tcg_global_reg_new_internal()
4585 temp_sync(s, ots, s->reserved_regs, preferred_regs, IS_DEAD_ARG(0)); in tcg_reg_alloc_do_movi()
4602 allocated_regs = s->reserved_regs; in tcg_reg_alloc_mov()
4729 TCGRegSet allocated_regs = s->reserved_regs; in tcg_reg_alloc_dup()
4764 temp_sync(s, its, s->reserved_regs, 0, 0); in tcg_reg_alloc_dup()
4795 temp_sync(s, ots, s->reserved_regs, 0, 0); in tcg_reg_alloc_dup()
4825 i_allocated_regs = s->reserved_regs; in tcg_reg_alloc_op()
4826 o_allocated_regs = s->reserved_regs; in tcg_reg_alloc_op()
5221 TCGRegSet allocated_regs = s->reserved_regs; in tcg_reg_alloc_dup2()
[all …]
/openbmc/qemu/tcg/loongarch64/
H A Dtcg-target.c.inc2432 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
2500 s->reserved_regs = 0;
2501 tcg_regset_set_reg(s->reserved_regs, TCG_REG_ZERO);
2502 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP0);
2503 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP1);
2504 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP2);
2505 tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP);
2506 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TP);
2507 tcg_regset_set_reg(s->reserved_regs, TCG_REG_RESERVED);
2508 tcg_regset_set_reg(s->reserved_regs, TCG_VEC_TMP0);
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.c.inc2812 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
2916 s->reserved_regs = 0;
2917 tcg_regset_set_reg(s->reserved_regs, TCG_REG_ZERO);
2918 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP0);
2919 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP1);
2920 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP2);
2921 tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP);
2922 tcg_regset_set_reg(s->reserved_regs, TCG_REG_GP);
2923 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TP);
2931 s->reserved_regs |= (~ALL_QVECTOR_REG_GROUPS & ALL_VECTOR_REGS);
[all …]
/openbmc/qemu/tcg/tci/
H A Dtcg-target.c.inc945 s->reserved_regs = 0;
946 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP);
947 tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
/openbmc/qemu/tcg/i386/
H A Dtcg-target.c.inc4372 tcg_regset_set_reg(s->reserved_regs, x86_guest_base.index);
4451 s->reserved_regs = 0;
4452 tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
4453 tcg_regset_set_reg(s->reserved_regs, TCG_TMP_VEC);
4456 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM6);
4457 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM7);
4458 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM8);
4459 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM9);
4460 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM10);
4461 tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM11);
[all …]
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.c.inc3182 s->reserved_regs = 0;
3183 tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP);
3184 tcg_regset_set_reg(s->reserved_regs, TCG_REG_FP);
3185 tcg_regset_set_reg(s->reserved_regs, TCG_REG_X18); /* platform register */
3186 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP0);
3187 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP1);
3188 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP2);
3189 tcg_regset_set_reg(s->reserved_regs, TCG_VEC_TMP0);
3243 tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE);
/openbmc/qemu/tcg/ppc/
H A Dtcg-target.c.inc2855 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);
4407 s->reserved_regs = 0;
4408 tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0); /* tcg temp */
4409 tcg_regset_set_reg(s->reserved_regs, TCG_REG_R1); /* stack pointer */
4411 tcg_regset_set_reg(s->reserved_regs, TCG_REG_R2); /* toc pointer */
4414 tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13); /* thread pointer */
4416 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP1);
4417 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP2);
4418 tcg_regset_set_reg(s->reserved_regs, TCG_VEC_TMP1);
4419 tcg_regset_set_reg(s->reserved_regs, TCG_VEC_TMP2);
[all …]
/openbmc/qemu/include/tcg/
H A Dtcg.h469 TCGRegSet reserved_regs; member
/openbmc/qemu/tcg/arm/
H A Dtcg-target.c.inc2319 s->reserved_regs = 0;
2320 tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
2321 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP);
2322 tcg_regset_set_reg(s->reserved_regs, TCG_REG_PC);
2323 tcg_regset_set_reg(s->reserved_regs, TCG_VEC_TMP);
2979 tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE);
/openbmc/qemu/tcg/s390x/
H A Dtcg-target.c.inc3544 s->reserved_regs = 0;
3545 tcg_regset_set_reg(s->reserved_regs, TCG_TMP0);
3546 tcg_regset_set_reg(s->reserved_regs, TCG_VEC_TMP0);
3548 tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0);
3549 tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
3570 tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG);