| /openbmc/qemu/hw/intc/ |
| H A D | exynos4210_combiner.c | 87 uint32_t reg_n; /* Register number inside the quad */ in exynos4210_combiner_read() local
92 reg_n = (offset - (req_quad_base_n << 4)) >> 2; in exynos4210_combiner_read()
96 return s->icipsr[reg_n]; in exynos4210_combiner_read()
101 switch (reg_n) { in exynos4210_combiner_read()
179 uint32_t reg_n; /* Register number inside the quad */ in exynos4210_combiner_write() local
183 reg_n = (offset - (req_quad_base_n << 4)) >> 2; in exynos4210_combiner_write()
191 if (reg_n > 1) { in exynos4210_combiner_write()
203 switch (reg_n) { in exynos4210_combiner_write()
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| /openbmc/linux/drivers/net/ethernet/samsung/sxgbe/ |
| H A D | sxgbe_core.c | 90 unsigned int reg_n) in sxgbe_core_set_umac_addr() argument
97 writel(high_word, ioaddr + SXGBE_CORE_ADD_HIGHOFFSET(reg_n)); in sxgbe_core_set_umac_addr()
98 writel(low_word, ioaddr + SXGBE_CORE_ADD_LOWOFFSET(reg_n)); in sxgbe_core_set_umac_addr()
102 unsigned int reg_n) in sxgbe_core_get_umac_addr() argument
106 high_word = readl(ioaddr + SXGBE_CORE_ADD_HIGHOFFSET(reg_n)); in sxgbe_core_get_umac_addr()
107 low_word = readl(ioaddr + SXGBE_CORE_ADD_LOWOFFSET(reg_n)); in sxgbe_core_get_umac_addr()
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| H A D | sxgbe_common.h | 333 unsigned int reg_n);
335 unsigned int reg_n);
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| H A D | sxgbe_main.c | 1822 unsigned int reg_n) in sxgbe_set_umac_addr() argument
1831 writel(data | SXGBE_HI_REG_AE, ioaddr + SXGBE_ADDR_HIGH(reg_n)); in sxgbe_set_umac_addr()
1833 writel(data, ioaddr + SXGBE_ADDR_LOW(reg_n)); in sxgbe_set_umac_addr()
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| /openbmc/linux/drivers/input/keyboard/ |
| H A D | bcm-keypad.c | 49 #define KPSSRN_OFFSET(reg_n) (KPSSR0_OFFSET + 4 * (reg_n)) argument
54 #define KPICRN_OFFSET(reg_n) (KPICR0_OFFSET + 4 * (reg_n)) argument
62 #define BIT_TO_ROW_SSRN(bit_nr, reg_n) (((bit_nr) >> 3) + 4 * (reg_n)) argument
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| /openbmc/linux/drivers/net/ethernet/stmicro/stmmac/ |
| H A D | dwmac1000_core.c | 99 unsigned int reg_n) in dwmac1000_set_umac_addr() argument
102 stmmac_set_mac_addr(ioaddr, addr, GMAC_ADDR_HIGH(reg_n), in dwmac1000_set_umac_addr()
103 GMAC_ADDR_LOW(reg_n)); in dwmac1000_set_umac_addr()
108 unsigned int reg_n) in dwmac1000_get_umac_addr() argument
111 stmmac_get_mac_addr(ioaddr, addr, GMAC_ADDR_HIGH(reg_n), in dwmac1000_get_umac_addr()
112 GMAC_ADDR_LOW(reg_n)); in dwmac1000_get_umac_addr()
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| H A D | dwmac-sun8i.c | 647 unsigned int reg_n) in sun8i_dwmac_set_umac_addr() argument
653 writel(0, ioaddr + EMAC_MACADDR_HI(reg_n)); in sun8i_dwmac_set_umac_addr()
657 stmmac_set_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n), in sun8i_dwmac_set_umac_addr()
658 EMAC_MACADDR_LO(reg_n)); in sun8i_dwmac_set_umac_addr()
659 if (reg_n > 0) { in sun8i_dwmac_set_umac_addr()
660 v = readl(ioaddr + EMAC_MACADDR_HI(reg_n)); in sun8i_dwmac_set_umac_addr()
662 writel(v, ioaddr + EMAC_MACADDR_HI(reg_n)); in sun8i_dwmac_set_umac_addr()
668 unsigned int reg_n) in sun8i_dwmac_get_umac_addr() argument
672 stmmac_get_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n), in sun8i_dwmac_get_umac_addr()
673 EMAC_MACADDR_LO(reg_n)); in sun8i_dwmac_get_umac_addr()
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| H A D | dwmac100_core.c | 64 unsigned int reg_n) in dwmac100_set_umac_addr() argument
72 unsigned int reg_n) in dwmac100_get_umac_addr() argument
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| H A D | dwmac4_core.c | 365 const unsigned char *addr, unsigned int reg_n) in dwmac4_set_umac_addr() argument
369 stmmac_dwmac4_set_mac_addr(ioaddr, addr, GMAC_ADDR_HIGH(reg_n), in dwmac4_set_umac_addr()
370 GMAC_ADDR_LOW(reg_n)); in dwmac4_set_umac_addr()
374 unsigned char *addr, unsigned int reg_n) in dwmac4_get_umac_addr() argument
378 stmmac_dwmac4_get_mac_addr(ioaddr, addr, GMAC_ADDR_HIGH(reg_n), in dwmac4_get_umac_addr()
379 GMAC_ADDR_LOW(reg_n)); in dwmac4_get_umac_addr()
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| H A D | dwxgmac2_core.c | 396 unsigned int reg_n) in dwxgmac2_set_umac_addr() argument
402 writel(value | XGMAC_AE, ioaddr + XGMAC_ADDRx_HIGH(reg_n)); in dwxgmac2_set_umac_addr()
405 writel(value, ioaddr + XGMAC_ADDRx_LOW(reg_n)); in dwxgmac2_set_umac_addr()
409 unsigned char *addr, unsigned int reg_n) in dwxgmac2_get_umac_addr() argument
415 hi_addr = readl(ioaddr + XGMAC_ADDRx_HIGH(reg_n)); in dwxgmac2_get_umac_addr()
416 lo_addr = readl(ioaddr + XGMAC_ADDRx_LOW(reg_n)); in dwxgmac2_get_umac_addr()
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| H A D | hwif.h | 350 unsigned int reg_n);
352 unsigned int reg_n);
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| /openbmc/linux/drivers/net/ethernet/hisilicon/ |
| H A D | hisi_femac.c | 567 unsigned int reg_n, bool enable) in hisi_femac_enable_hw_addr_filter() argument
571 val = readl(priv->glb_base + GLB_MAC_H16(reg_n)); in hisi_femac_enable_hw_addr_filter()
576 writel(val, priv->glb_base + GLB_MAC_H16(reg_n)); in hisi_femac_enable_hw_addr_filter()
581 unsigned int reg_n) in hisi_femac_set_hw_addr_filter() argument
586 high = GLB_MAC_H16(reg_n); in hisi_femac_set_hw_addr_filter()
587 low = GLB_MAC_L32(reg_n); in hisi_femac_set_hw_addr_filter()
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