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Searched refs:reg_index (Results 1 – 25 of 54) sorted by relevance

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/openbmc/qemu/hw/net/fsl_etsec/
H A Detsec.c80 uint32_t reg_index = addr / 4; in etsec_read() local
84 assert(reg_index < ETSEC_REG_NUMBER); in etsec_read()
86 reg = &etsec->regs[reg_index]; in etsec_read()
111 uint32_t reg_index, in write_tstat() argument
129 uint32_t reg_index, in write_rstat() argument
147 uint32_t reg_index, in write_tbasex() argument
153 etsec->regs[TBPTR0 + (reg_index - TBASE0)].value = value & ~0x7; in write_tbasex()
158 uint32_t reg_index, in write_rbasex() argument
164 etsec->regs[RBPTR0 + (reg_index - RBASE0)].value = value & ~0x7; in write_rbasex()
169 uint32_t reg_index, in write_dmactrl() argument
[all …]
H A Dmiim.c90 uint32_t reg_index, in etsec_write_miim() argument
94 switch (reg_index) { in etsec_write_miim()
H A Detsec.h149 uint32_t reg_index,
/openbmc/u-boot/drivers/misc/imx8/
H A Dscu.c50 static int mu_hal_sendmsg(struct mu_type *base, u32 reg_index, u32 msg) in mu_hal_sendmsg() argument
52 u32 mask = MU_SR_TE0_MASK >> reg_index; in mu_hal_sendmsg()
56 assert(reg_index < MU_TR_COUNT); in mu_hal_sendmsg()
65 writel(msg, &base->tr[reg_index]); in mu_hal_sendmsg()
70 static int mu_hal_receivemsg(struct mu_type *base, u32 reg_index, u32 *msg) in mu_hal_receivemsg() argument
72 u32 mask = MU_SR_RF0_MASK >> reg_index; in mu_hal_receivemsg()
76 assert(reg_index < MU_TR_COUNT); in mu_hal_receivemsg()
85 *msg = readl(&base->rr[reg_index]); in mu_hal_receivemsg()
/openbmc/linux/drivers/pinctrl/nomadik/
H A Dpinctrl-nomadik.h35 .reg_index = altc1_ri,\
40 .reg_index = altc2_ri,\
45 .reg_index = altc3_ri,\
50 .reg_index = altc4_ri,\
84 u8 reg_index:2; member
/openbmc/linux/drivers/powercap/
H A Dintel_rapl_tpmi.c146 enum tpmi_rapl_register reg_index; in parse_one_domain() local
213 reg_index = TPMI_RAPL_REG_HEADER; in parse_one_domain()
214 while (++reg_index != TPMI_RAPL_REG_MAX) { in parse_one_domain()
215 if (!(tpmi_domain_flags & BIT(reg_index))) in parse_one_domain()
218 switch (reg_index) { in parse_one_domain()
246 trp->priv.regs[domain_type][reg_id].mmio = trp->base + offset + reg_index * 8; in parse_one_domain()
/openbmc/linux/drivers/media/tuners/
H A Dqm1d1c0042.c42 static int reg_index; variable
341 for (reg_index = 0; reg_index < QM1D1C0042_NUM_REG_ROWS; in qm1d1c0042_init()
342 reg_index++) { in qm1d1c0042_init()
343 if (val == reg_initval[reg_index][0x00]) in qm1d1c0042_init()
346 if (reg_index >= QM1D1C0042_NUM_REG_ROWS) { in qm1d1c0042_init()
350 memcpy(state->regs, reg_initval[reg_index], QM1D1C0042_NUM_REGS); in qm1d1c0042_init()
/openbmc/linux/drivers/irqchip/
H A Dirq-mtk-sysirq.c32 u32 offset, reg_index, value; in mtk_sysirq_set_type() local
37 reg_index = chip_data->which_word[hwirq]; in mtk_sysirq_set_type()
41 value = readl_relaxed(base + reg_index * 4); in mtk_sysirq_set_type()
52 writel_relaxed(value, base + reg_index * 4); in mtk_sysirq_set_type()
/openbmc/linux/drivers/power/supply/
H A Dbq27xxx_battery.c1140 static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index, in bq27xxx_read() argument
1145 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) in bq27xxx_read()
1148 ret = di->bus.read(di, di->regs[reg_index], single); in bq27xxx_read()
1151 di->regs[reg_index], reg_index); in bq27xxx_read()
1156 static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index, in bq27xxx_write() argument
1161 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) in bq27xxx_write()
1167 ret = di->bus.write(di, di->regs[reg_index], value, single); in bq27xxx_write()
1170 di->regs[reg_index], reg_index); in bq27xxx_write()
1175 static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index, in bq27xxx_read_block() argument
1180 if (!di || di->regs[reg_index] == INVALID_REG_ADDR) in bq27xxx_read_block()
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/openbmc/qemu/target/riscv/
H A Dpmp.c466 void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index, in pmpcfg_csr_write() argument
474 trace_pmpcfg_csr_write(env->mhartid, reg_index, val); in pmpcfg_csr_write()
478 modified |= pmp_write_cfg(env, (reg_index * 4) + i, cfg_val); in pmpcfg_csr_write()
492 target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t reg_index) in pmpcfg_csr_read() argument
500 val = pmp_read_cfg(env, (reg_index * 4) + i); in pmpcfg_csr_read()
503 trace_pmpcfg_csr_read(env->mhartid, reg_index, cfg_val); in pmpcfg_csr_read()
H A Dtrace-events5 pmpcfg_csr_read(uint64_t mhartid, uint32_t reg_index, uint64_t val) "hart %" PRIu64 ": read reg%" P…
6 pmpcfg_csr_write(uint64_t mhartid, uint32_t reg_index, uint64_t val) "hart %" PRIu64 ": write reg%"…
H A Dpmp.h67 void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index,
69 target_ulong pmpcfg_csr_read(CPURISCVState *env, uint32_t reg_index);
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_lsdma.c30 uint32_t reg_index, uint32_t reg_val, in amdgpu_lsdma_wait_for() argument
37 val = RREG32(reg_index); in amdgpu_lsdma_wait_for()
H A Dclearstate_defs.h35 const unsigned int reg_index; member
H A Damdgpu_lsdma.h43 int amdgpu_lsdma_wait_for(struct amdgpu_device *adev, uint32_t reg_index,
/openbmc/linux/tools/arch/x86/kcpuid/
H A Dkcpuid.c312 int reg_index; in parse_line() local
360 reg_index = R_EAX; in parse_line()
362 reg_index = R_EBX; in parse_line()
364 reg_index = R_ECX; in parse_line()
366 reg_index = R_EDX; in parse_line()
370 reg = &leaf->info[reg_index]; in parse_line()
/openbmc/qemu/hw/display/
H A Dcirrus_vga.c1482 static int cirrus_vga_read_gr(CirrusVGAState * s, unsigned reg_index) in cirrus_vga_read_gr() argument
1484 switch (reg_index) { in cirrus_vga_read_gr()
1501 if (reg_index < 0x3a) { in cirrus_vga_read_gr()
1502 return s->vga.gr[reg_index]; in cirrus_vga_read_gr()
1505 "cirrus: inport gr_index 0x%02x\n", reg_index); in cirrus_vga_read_gr()
1511 cirrus_vga_write_gr(CirrusVGAState * s, unsigned reg_index, int reg_value) in cirrus_vga_write_gr() argument
1513 trace_vga_cirrus_write_gr(reg_index, reg_value); in cirrus_vga_write_gr()
1514 switch (reg_index) { in cirrus_vga_write_gr()
1516 s->vga.gr[reg_index] = reg_value & gr_mask[reg_index]; in cirrus_vga_write_gr()
1520 s->vga.gr[reg_index] = reg_value & gr_mask[reg_index]; in cirrus_vga_write_gr()
[all …]
/openbmc/linux/arch/powerpc/platforms/ps3/
H A Dplatform.h114 unsigned int dev_index, unsigned int reg_index,
117 unsigned int dev_index, unsigned int reg_index, u64 *bus_addr,
120 unsigned int dev_index, unsigned int reg_index,
H A Drepository.c250 unsigned int dev_index, unsigned int reg_index, in ps3_repository_read_dev_reg_type() argument
259 make_field("reg", reg_index), in ps3_repository_read_dev_reg_type()
267 unsigned int dev_index, unsigned int reg_index, u64 *bus_addr, u64 *len) in ps3_repository_read_dev_reg_addr() argument
272 make_field("reg", reg_index), in ps3_repository_read_dev_reg_addr()
278 unsigned int dev_index, unsigned int reg_index, in ps3_repository_read_dev_reg() argument
282 reg_index, reg_type); in ps3_repository_read_dev_reg()
285 reg_index, bus_addr, len); in ps3_repository_read_dev_reg()
/openbmc/linux/drivers/media/dvb-frontends/
H A Dstv0900_core.c882 reg_index, in stv0900_activate_s2_modcod() local
894 reg_index = MODCODLSTF - mod_code / 2; in stv0900_activate_s2_modcod()
916 stv0900_write_reg(intp, reg_index, in stv0900_activate_s2_modcod()
919 stv0900_write_reg(intp, reg_index, in stv0900_activate_s2_modcod()
924 for (reg_index = 0; reg_index < 7; reg_index++) in stv0900_activate_s2_modcod()
925 stv0900_write_reg(intp, MODCODLST0 + reg_index, 0xff); in stv0900_activate_s2_modcod()
929 for (reg_index = 0; reg_index < 8; reg_index++) in stv0900_activate_s2_modcod()
930 stv0900_write_reg(intp, MODCODLST7 + reg_index, 0xcc); in stv0900_activate_s2_modcod()
939 u32 reg_index; in stv0900_activate_s2_modcod_single() local
946 for (reg_index = 0; reg_index < 13; reg_index++) in stv0900_activate_s2_modcod_single()
[all …]
/openbmc/linux/drivers/gpu/drm/radeon/
H A Dclearstate_defs.h35 const unsigned int reg_index; member
H A Dsumo_dpm.c476 u32 reg_index = index / 4; in sumo_set_divider_value() local
480 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_set_divider_value()
483 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_set_divider_value()
486 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_set_divider_value()
489 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_set_divider_value()
582 u32 reg_index = index / 4; in sumo_power_level_enable() local
586 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_power_level_enable()
589 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_power_level_enable()
592 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_power_level_enable()
595 WREG32_P(CG_SCLK_DPM_CTRL + (reg_index * 4), in sumo_power_level_enable()
/openbmc/linux/sound/pci/oxygen/
H A Dxonar_wm87x6.c505 unsigned int reg_index = (ctl->private_value >> 16) & 0xff; in wm8776_bit_switch_get() local
509 ((data->wm8776_regs[reg_index] & bit) != 0) ^ invert; in wm8776_bit_switch_get()
520 unsigned int reg_index = (ctl->private_value >> 16) & 0xff; in wm8776_bit_switch_put() local
525 reg_value = data->wm8776_regs[reg_index] & ~bit; in wm8776_bit_switch_put()
528 changed = reg_value != data->wm8776_regs[reg_index]; in wm8776_bit_switch_put()
530 wm8776_write(chip, reg_index, reg_value); in wm8776_bit_switch_put()
612 unsigned int value, reg_index, mode; in wm8776_field_set_from_ctl() local
630 reg_index = (ctl->private_value >> 24) & 0x1f; in wm8776_field_set_from_ctl()
635 reg_value = data->wm8776_regs[reg_index]; in wm8776_field_set_from_ctl()
638 wm8776_write_cached(chip, reg_index, reg_value); in wm8776_field_set_from_ctl()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_audio.c56 uint32_t reg_index, in write_indirect_azalia_reg() argument
63 AZALIA_ENDPOINT_REG_INDEX, reg_index); in write_indirect_azalia_reg()
70 static uint32_t read_indirect_azalia_reg(struct audio *audio, uint32_t reg_index) in read_indirect_azalia_reg() argument
78 AZALIA_ENDPOINT_REG_INDEX, reg_index); in read_indirect_azalia_reg()
/openbmc/linux/drivers/scsi/libsas/
H A Dsas_host_smp.c114 u8 reg_type, u8 reg_index, u8 reg_count, in sas_host_smp_write_gpio() argument
125 written = i->dft->lldd_write_gpio(sas_ha, reg_type, reg_index, in sas_host_smp_write_gpio()

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