Home
last modified time | relevance | path

Searched refs:regDSCL0_DSCL_CONTROL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h3771 #define regDSCL0_DSCL_CONTROL … macro
H A Ddcn_3_2_1_offset.h3296 #define regDSCL0_DSCL_CONTROL … macro
H A Ddcn_3_1_5_offset.h3530 #define regDSCL0_DSCL_CONTROL … macro
H A Ddcn_3_1_4_offset.h4684 #define regDSCL0_DSCL_CONTROL … macro
H A Ddcn_3_2_0_offset.h3297 #define regDSCL0_DSCL_CONTROL … macro
H A Ddcn_3_1_6_offset.h3991 #define regDSCL0_DSCL_CONTROL … macro