Home
last modified time | relevance | path

Searched refs:reg32_write (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/drivers/ddr/imx/imx8m/
H A Dlpddr4_init.c21 reg32_write(ddrc_cfg->reg, ddrc_cfg->val); in lpddr4_cfg_umctl2()
33 reg32_write(SRC_DDRC_RCR_ADDR + 0x04, 0x8F00000F); in ddr_init()
34 reg32_write(SRC_DDRC_RCR_ADDR, 0x8F00000F); in ddr_init()
35 reg32_write(SRC_DDRC_RCR_ADDR + 0x04, 0x8F000000); in ddr_init()
37 reg32_write(SRC_DDRC_RCR_ADDR, 0x8F00001F); in ddr_init()
38 reg32_write(SRC_DDRC_RCR_ADDR, 0x8F00000F); in ddr_init()
53 reg32_write(0x303A00EC, 0x0000ffff); /* PGC_CPU_MAPPING */ in ddr_init()
63 reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000006); in ddr_init()
75 reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000004); in ddr_init()
76 reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000000); in ddr_init()
[all …]
H A Dddr4_init.c19 reg32_write(ddrc_cfg->reg, ddrc_cfg->val); in ddr4_cfg_umctl2()
32 reg32_write(SRC_DDRC_RCR_ADDR, 0x8F00003F); in ddr_init()
34 reg32_write(SRC_DDRC_RCR_ADDR, 0x8F00000F); in ddr_init()
46 reg32_write(0x303A00EC, 0x0000ffff); /* PGC_CPU_MAPPING */ in ddr_init()
50 reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000006); in ddr_init()
52 reg32_write(DDRC_DBG1(0), 0x00000001); in ddr_init()
53 reg32_write(DDRC_PWRCTL(0), 0x00000001); in ddr_init()
61 reg32_write(DDRC_RFSHCTL3(0), 0x00000001); in ddr_init()
64 reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000004); in ddr_init()
65 reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000000); in ddr_init()
[all …]
H A Dddrphy_utils.c27 reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0031, 0x0); in ack_pmu_message_receive()
33 reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * 0xd0031, 0x1); in ack_pmu_message_receive()
161 reg32_write(DDRC_MRCTRL0(0), (mr_rank << 4)); in lpddr4_mr_write()
162 reg32_write(DDRC_MRCTRL1(0), (mr_addr << 8) | mr_data); in lpddr4_mr_write()
170 reg32_write(DRC_PERF_MON_MRR0_DAT(0), 0x1); in lpddr4_mr_read()
175 reg32_write(DDRC_MRCTRL0(0), (mr_rank << 4) | 0x1); in lpddr4_mr_read()
176 reg32_write(DDRC_MRCTRL1(0), (mr_addr << 8)); in lpddr4_mr_read()
183 reg32_write(DRC_PERF_MON_MRR0_DAT(0), 0x4); in lpddr4_mr_read()
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h717 static inline void reg32_write(unsigned long addr, u32 val) in reg32_write() function
733 reg32_write(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + 4 * (addr), data)