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Searched refs:rd0 (Results 1 – 11 of 11) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dtranslate.c1487 int rdhi, rdlo, rd0, rd1, i; in disas_iwmmxt_insn() local
1575 rd0 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1577 gen_op_iwmmxt_movq_M0_wRn(rd0); in disas_iwmmxt_insn()
1616 rd0 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1618 gen_op_iwmmxt_movq_M0_wRn(rd0); in disas_iwmmxt_insn()
1635 rd0 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1637 gen_op_iwmmxt_movq_M0_wRn(rd0); in disas_iwmmxt_insn()
1647 rd0 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
1649 gen_op_iwmmxt_movq_M0_wRn(rd0); in disas_iwmmxt_insn()
1658 rd0 = (insn >> 0) & 0xf; in disas_iwmmxt_insn()
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H A Dtranslate-neon.c1588 TCGv_i32 rd0, rd1; in DO_PREWIDEN() local
1615 rd0 = tcg_temp_new_i32(); in DO_PREWIDEN()
1623 narrowfn(rd0, rn_64); in DO_PREWIDEN()
1632 write_neon_element32(rd0, a->vd, 0, MO_32); in DO_PREWIDEN()
1677 TCGv_i64 rd0, rd1, tmp; in DO_NARROW_3D() local
1703 rd0 = tcg_temp_new_i64(); in DO_NARROW_3D()
1710 opfn(rd0, rn, rm); in DO_NARROW_3D()
1720 accfn(rd0, tmp, rd0); in DO_NARROW_3D()
1725 write_neon_element64(rd0, a->vd, 0, MO_64); in DO_NARROW_3D()
2841 TCGv_i64 rm, rd0, rd1; in do_vmovn() local
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/openbmc/u-boot/drivers/net/
H A Dsh_eth.c127 if (port_info->rx_desc_cur->rd0 & RD_RACT) in sh_eth_recv_start()
131 if (port_info->rx_desc_cur->rd0 & RD_RFE) in sh_eth_recv_start()
142 if (port_info->rx_desc_cur->rd0 & RD_RDLE) in sh_eth_recv_finish()
143 port_info->rx_desc_cur->rd0 = RD_RACT | RD_RDLE; in sh_eth_recv_finish()
145 port_info->rx_desc_cur->rd0 = RD_RACT; in sh_eth_recv_finish()
289 cur_rx_desc->rd0 = RD_RACT; in sh_eth_rx_desc_init()
296 cur_rx_desc->rd0 |= RD_RDLE; in sh_eth_rx_desc_init()
H A Dsh_eth.h75 volatile u32 rd0; member
/openbmc/linux/drivers/staging/vt6655/
H A Dcard.c444 pDesc->rd0.res_count = cpu_to_le16(priv->rx_buf_sz); in CARDvSafeResetRx()
445 pDesc->rd0.owner = OWNED_BY_NIC; in CARDvSafeResetRx()
452 pDesc->rd0.res_count = cpu_to_le16(priv->rx_buf_sz); in CARDvSafeResetRx()
453 pDesc->rd0.owner = OWNED_BY_NIC; in CARDvSafeResetRx()
H A Ddesc.h185 volatile struct vnt_rdes0 rd0; member
H A Ddpc.c130 - le16_to_cpu(curr_rd->rd0.res_count); in vnt_receive_frame()
H A Ddevice_main.c827 rd->rd0.owner == OWNED_BY_HOST; in device_rx_srv()
842 rd->rd0.owner = OWNED_BY_NIC; in device_rx_srv()
869 *((unsigned int *)&rd->rd0) = 0; /* FIX cast */ in device_alloc_rx_buf()
871 rd->rd0.res_count = cpu_to_le16(priv->rx_buf_sz); in device_alloc_rx_buf()
872 rd->rd0.owner = OWNED_BY_NIC; in device_alloc_rx_buf()
/openbmc/qemu/tcg/arm/
H A Dtcg-target.c.inc919 static void tcg_out_umull32(TCGContext *s, ARMCond cond, TCGReg rd0,
924 (rd1 << 16) | (rd0 << 12) | (rm << 8) | rn);
927 static void tcg_out_smull32(TCGContext *s, ARMCond cond, TCGReg rd0,
932 (rd1 << 16) | (rd0 << 12) | (rm << 8) | rn);
/openbmc/linux/Documentation/admin-guide/
H A Dmd.rst604 So for a 3 drive array there will be rd0, rd1, rd2.
H A Dras.rst1014 Ch0 phy rd0, wr0 (0x063f4031): 2 ranks, UDIMMs