Searched refs:rate_hz (Results 1 – 7 of 7) sorted by relevance
| /openbmc/linux/drivers/hwmon/ |
| H A D | ltc2947-core.c | 991 unsigned long rate_hz; in ltc2947_setup() local
996 rate_hz = clk_get_rate(extclk); in ltc2947_setup()
997 if (rate_hz < LTC2947_CLK_MIN || rate_hz > LTC2947_CLK_MAX) { in ltc2947_setup()
999 rate_hz); in ltc2947_setup()
1004 if (rate_hz >= LTC2947_CLK_MIN && rate_hz <= 1000000) in ltc2947_setup()
1006 else if (rate_hz > 1000000 && rate_hz <= 2000000) in ltc2947_setup()
1008 else if (rate_hz > 2000000 && rate_hz <= 4000000) in ltc2947_setup()
1010 else if (rate_hz > 4000000 && rate_hz <= 8000000) in ltc2947_setup()
1012 else if (rate_hz > 8000000 && rate_hz <= 16000000) in ltc2947_setup()
1014 else if (rate_hz > 16000000 && rate_hz <= LTC2947_CLK_MAX) in ltc2947_setup()
[all …]
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| /openbmc/linux/drivers/mmc/host/ |
| H A D | sdhci-of-aspeed.c | 162 static int aspeed_sdhci_phase_to_tap(struct device *dev, unsigned long rate_hz, in aspeed_sdhci_phase_to_tap() argument
184 clk_period_ps = div_u64(PICOSECONDS_PER_SECOND, (u64)rate_hz); in aspeed_sdhci_phase_to_tap()
191 tap, phase_deg, rate_hz, ASPEED_SDHCI_NR_TAPS); in aspeed_sdhci_phase_to_tap()
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| /openbmc/linux/drivers/spi/ |
| H A D | spi-sn-f-ospi.c | 193 long rate_hz = clk_get_rate(ospi->clk); in f_ospi_config_clk() local
194 u32 div = DIV_ROUND_UP(rate_hz, device_hz); in f_ospi_config_clk()
198 if (rate_hz < device_hz) { in f_ospi_config_clk()
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| /openbmc/u-boot/arch/arm/mach-bcm283x/ |
| H A D | msg.c | 86 return msg_clk->get_clock_rate.body.resp.rate_hz; in bcm2835_get_mmc_clock()
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| /openbmc/u-boot/arch/arm/mach-bcm283x/include/mach/ |
| H A D | mbox.h | 246 u32 rate_hz; member
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| /openbmc/linux/drivers/misc/ |
| H A D | bh1770glc.c | 1010 unsigned long rate_hz; in bh1770_set_lux_rate() local
1013 ret = kstrtoul(buf, 0, &rate_hz); in bh1770_set_lux_rate()
1018 if (rate_hz >= lux_rates_hz[i]) in bh1770_set_lux_rate()
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| /openbmc/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3288.c | 337 int periph, unsigned int rate_hz) in rockchip_vop_set_clk() argument
343 ret = pll_para_config(rate_hz, &npll_config, &lcdc_div); in rockchip_vop_set_clk()
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