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Searched refs:rams (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/microblaze/
H A Dmmu.c44 t = mmu->rams[RAM_TAG][idx]; in mmu_flush_idx()
67 for (i = 0; i < ARRAY_SIZE(mmu->rams[RAM_TAG]); i++) { in mmu_change_pid()
69 t = mmu->rams[RAM_TAG][i]; in mmu_change_pid()
88 for (i = 0; i < ARRAY_SIZE(mmu->rams[RAM_TAG]); i++) { in mmu_translate()
92 t = mmu->rams[RAM_TAG][i]; in mmu_translate()
111 d = mmu->rams[RAM_DATA][i]; in mmu_translate()
205 r = extract64(env->mmu.rams[rn & 1][i], ext * 32, 32); in mmu_read()
264 tmp64 = env->mmu.rams[rn & 1][i]; in mmu_write()
265 env->mmu.rams[rn & 1][i] = deposit64(tmp64, ext * 32, 32, v); in mmu_write()
H A Dmmu.h70 uint64_t rams[2][TLB_ENTRIES]; member
H A Dmachine.c26 VMSTATE_UINT64_2DARRAY(rams, MicroBlazeMMU, 2, TLB_ENTRIES),