/openbmc/linux/sound/soc/codecs/ |
H A D | wm8961.c | 197 u16 pwr_reg = snd_soc_component_read(component, WM8961_PWR_MGMT_2); in wm8961_hp_event() local 212 pwr_reg |= WM8961_LOUT1_PGA | WM8961_ROUT1_PGA; in wm8961_hp_event() 213 snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg); in wm8961_hp_event() 271 pwr_reg &= ~(WM8961_LOUT1_PGA | WM8961_ROUT1_PGA); in wm8961_hp_event() 272 snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg); in wm8961_hp_event() 287 u16 pwr_reg = snd_soc_component_read(component, WM8961_PWR_MGMT_2); in wm8961_spk_event() local 292 pwr_reg |= WM8961_SPKL_PGA | WM8961_SPKR_PGA; in wm8961_spk_event() 293 snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg); in wm8961_spk_event() 306 pwr_reg &= ~(WM8961_SPKL_PGA | WM8961_SPKR_PGA); in wm8961_spk_event() 307 snd_soc_component_write(component, WM8961_PWR_MGMT_2, pwr_reg); in wm8961_spk_event()
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H A D | wm8940.c | 480 u16 pwr_reg = snd_soc_component_read(component, WM8940_POWER1) & 0x1F0; in wm8940_set_bias_level() local 486 pwr_reg |= (1 << 2) | (1 << 3); in wm8940_set_bias_level() 493 ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x1); in wm8940_set_bias_level() 497 pwr_reg |= (1 << 2) | (1 << 3); in wm8940_set_bias_level() 498 ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x1); in wm8940_set_bias_level() 510 pwr_reg |= (1 << 2) | (1 << 3); in wm8940_set_bias_level() 512 ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg | 0x2); in wm8940_set_bias_level() 515 ret = snd_soc_component_write(component, WM8940_POWER1, pwr_reg); in wm8940_set_bias_level()
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H A D | wm8971.c | 564 u16 pwr_reg = snd_soc_component_read(component, WM8971_PWR1) & 0xfe3e; in wm8971_set_bias_level() local 569 snd_soc_component_write(component, WM8971_PWR1, pwr_reg | 0x00c1); in wm8971_set_bias_level() 579 snd_soc_component_write(component, WM8971_PWR1, pwr_reg | 0x01c0); in wm8971_set_bias_level() 584 snd_soc_component_write(component, WM8971_PWR1, pwr_reg | 0x0140); in wm8971_set_bias_level()
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H A D | wm8750.c | 624 u16 pwr_reg = snd_soc_component_read(component, WM8750_PWR1) & 0xfe3e; in wm8750_set_bias_level() local 629 snd_soc_component_write(component, WM8750_PWR1, pwr_reg | 0x00c0); in wm8750_set_bias_level() 638 snd_soc_component_write(component, WM8750_PWR1, pwr_reg | 0x01c1); in wm8750_set_bias_level() 645 snd_soc_component_write(component, WM8750_PWR1, pwr_reg | 0x0141); in wm8750_set_bias_level()
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H A D | wm8988.c | 726 u16 pwr_reg = snd_soc_component_read(component, WM8988_PWR1) & ~0x1c1; in wm8988_set_bias_level() local 734 snd_soc_component_write(component, WM8988_PWR1, pwr_reg | 0x00c0); in wm8988_set_bias_level() 742 snd_soc_component_write(component, WM8988_PWR1, pwr_reg | 0x1c1); in wm8988_set_bias_level() 749 snd_soc_component_write(component, WM8988_PWR1, pwr_reg | 0x0141); in wm8988_set_bias_level()
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H A D | wm8958-dsp2.c | 327 int pwr_reg = snd_soc_component_read(component, WM8994_POWER_MANAGEMENT_5); in wm8958_dsp_apply() local 332 pwr_reg &= (WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC1R_ENA); in wm8958_dsp_apply() 336 pwr_reg &= (WM8994_AIF1DAC2L_ENA | WM8994_AIF1DAC2R_ENA); in wm8958_dsp_apply() 340 pwr_reg &= (WM8994_AIF2DACL_ENA | WM8994_AIF2DACR_ENA); in wm8958_dsp_apply() 352 if (!pwr_reg) in wm8958_dsp_apply() 358 path, wm8994->dsp_active, start, pwr_reg, reg); in wm8958_dsp_apply()
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H A D | wm8753.c | 1334 u16 pwr_reg = snd_soc_component_read(component, WM8753_PWR1) & 0xfe3e; in wm8753_set_bias_level() local 1339 snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x00c0); in wm8753_set_bias_level() 1348 snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x01c1); in wm8753_set_bias_level() 1353 snd_soc_component_write(component, WM8753_PWR1, pwr_reg | 0x0141); in wm8753_set_bias_level()
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/openbmc/u-boot/drivers/clk/mediatek/ |
H A D | clk-mtk.c | 208 r = readl(priv->base + pll->pwr_reg) | CON0_PWR_ON; in mtk_apmixedsys_enable() 209 writel(r, priv->base + pll->pwr_reg); in mtk_apmixedsys_enable() 212 r = readl(priv->base + pll->pwr_reg) & ~CON0_ISO_EN; in mtk_apmixedsys_enable() 213 writel(r, priv->base + pll->pwr_reg); in mtk_apmixedsys_enable() 247 r = readl(priv->base + pll->pwr_reg) | CON0_ISO_EN; in mtk_apmixedsys_disable() 248 writel(r, priv->base + pll->pwr_reg); in mtk_apmixedsys_disable() 250 r = readl(priv->base + pll->pwr_reg) & ~CON0_PWR_ON; in mtk_apmixedsys_disable() 251 writel(r, priv->base + pll->pwr_reg); in mtk_apmixedsys_disable()
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H A D | clk-mtk.h | 32 u32 pwr_reg; member
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/openbmc/linux/drivers/mmc/host/ |
H A D | mmci_stm32_sdmmc.c | 393 pwr |= host->pwr_reg & (MCI_STM32_VSWITCHEN | in mmci_sdmmc_set_pwrreg() 661 mmci_write_pwrreg(host, host->pwr_reg | MCI_STM32_VSWITCHEN); in sdmmc_pre_sig_volt_vswitch() 673 host->pwr_reg & MCI_STM32_VSWITCHEN) { in sdmmc_post_sig_volt_switch() 674 mmci_write_pwrreg(host, host->pwr_reg | MCI_STM32_VSWITCH); in sdmmc_post_sig_volt_switch() 686 mmci_write_pwrreg(host, host->pwr_reg & in sdmmc_post_sig_volt_switch() 730 host->pwr_reg = readl_relaxed(host->base + MMCIPOWER); in sdmmc_variant_init()
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/openbmc/linux/drivers/pinctrl/renesas/ |
H A D | pinctrl-rzg2l.c | 558 u32 pwr_reg = 0x0; in rzg2l_pinctrl_pinconf_get() local 561 pwr_reg = SD_CH(0); in rzg2l_pinctrl_pinconf_get() 563 pwr_reg = SD_CH(1); in rzg2l_pinctrl_pinconf_get() 565 pwr_reg = QSPI; in rzg2l_pinctrl_pinconf_get() 570 addr = pctrl->base + pwr_reg; in rzg2l_pinctrl_pinconf_get() 655 u32 pwr_reg = 0x0; in rzg2l_pinctrl_pinconf_set() local 661 pwr_reg = SD_CH(0); in rzg2l_pinctrl_pinconf_set() 663 pwr_reg = SD_CH(1); in rzg2l_pinctrl_pinconf_set() 665 pwr_reg = QSPI; in rzg2l_pinctrl_pinconf_set() 669 addr = pctrl->base + pwr_reg; in rzg2l_pinctrl_pinconf_set()
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/openbmc/linux/drivers/clk/mediatek/ |
H A D | clk-mt8195-apusys_pll.c | 32 .pwr_reg = _pwr_reg, \
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H A D | clk-mt7981-apmixed.c | 29 .id = _id, .name = _name, .reg = _reg, .pwr_reg = _pwr_reg, \
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H A D | clk-mt8135-apmixedsys.c | 24 .pwr_reg = _pwr_reg, \
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H A D | clk-mt7986-apmixed.c | 27 .id = _id, .name = _name, .reg = _reg, .pwr_reg = _pwr_reg, \
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H A D | clk-pll.h | 30 u32 pwr_reg; member
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H A D | clk-mt8516-apmixedsys.c | 29 .pwr_reg = _pwr_reg, \
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H A D | clk-mt8167-apmixedsys.c | 28 .pwr_reg = _pwr_reg, \
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H A D | clk-mt8188-apmixedsys.c | 40 .pwr_reg = _pwr_reg, \
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H A D | clk-mt7622-apmixedsys.c | 26 .pwr_reg = _pwr_reg, \
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H A D | clk-mt2712-apmixedsys.c | 28 .pwr_reg = _pwr_reg, \
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H A D | clk-mt8365-apmixedsys.c | 26 .pwr_reg = _pwr_reg, \
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H A D | clk-mt8186-apmixedsys.c | 26 .pwr_reg = _pwr_reg, \
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H A D | clk-mt8183-apmixedsys.c | 62 .pwr_reg = _pwr_reg, \
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H A D | clk-mt8173-apmixedsys.c | 30 .pwr_reg = _pwr_reg, \
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