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Searched refs:puen (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/pinctrl/renesas/
H A Dcore.c680 for (i = 0; pfc->info->bias_regs[i].puen || in sh_pfc_walk_regs()
682 if (pfc->info->bias_regs[i].puen) in sh_pfc_walk_regs()
683 do_reg(pfc, pfc->info->bias_regs[i].puen, n++); in sh_pfc_walk_regs()
958 if (bias->puen) in sh_pfc_check_bias_reg()
959 sh_pfc_check_reg(info->name, bias->puen, bits); in sh_pfc_check_bias_reg()
963 pin = sh_pfc_find_pin(info, bias->puen, bias->pins[i]); in sh_pfc_check_bias_reg()
967 if (bias->puen && bias->pud) { in sh_pfc_check_bias_reg()
975 bias->puen, i, pin->name); in sh_pfc_check_bias_reg()
976 } else if (bias->puen) { in sh_pfc_check_bias_reg()
980 bias->puen, i, pin->name); in sh_pfc_check_bias_reg()
[all …]
H A Dpinctrl.c825 for (i = 0; info->bias_regs[i].puen || info->bias_regs[i].pud; i++) { in rcar_pin_to_bias_reg()
848 if (reg->puen) { in rcar_pinmux_get_bias()
849 if (!(sh_pfc_read(pfc, reg->puen) & BIT(bit))) in rcar_pinmux_get_bias()
874 if (reg->puen) { in rcar_pinmux_set_bias()
875 enable = sh_pfc_read(pfc, reg->puen) & ~BIT(bit); in rcar_pinmux_set_bias()
887 sh_pfc_write(pfc, reg->puen, enable); in rcar_pinmux_set_bias()
H A Dsh_pfc.h170 u32 puen; /* Pull-enable or pull-up control register */ member
176 .puen = r1, \
H A Dpfc-r8a77995.c3138 if (!(sh_pfc_read(pfc, reg->puen) & BIT(puen_bit))) in r8a77995_pinmux_get_bias()
3157 enable = sh_pfc_read(pfc, reg->puen) & ~BIT(puen_bit); in r8a77995_pinmux_set_bias()
3167 sh_pfc_write(pfc, reg->puen, enable); in r8a77995_pinmux_set_bias()
/openbmc/u-boot/arch/arm/cpu/arm926ejs/mx27/
H A Dgeneric.c217 writel(readl(&regs->port[port].puen) | (1 << pin), in imx_gpio_mode()
218 &regs->port[port].puen); in imx_gpio_mode()
220 writel(readl(&regs->port[port].puen) & ~(1 << pin), in imx_gpio_mode()
221 &regs->port[port].puen); in imx_gpio_mode()
/openbmc/u-boot/board/armadeus/apf27/
H A Dapf27.c63 u32 puen, u32 gius) in apf27_port_init() argument
79 writel(puen, &regs->port[port].puen); in apf27_port_init()
/openbmc/u-boot/arch/arm/include/asm/arch-mx27/
H A Dgpio.h29 u32 puen; member
/openbmc/u-boot/drivers/pinctrl/renesas/
H A Dsh_pfc.h150 u32 puen; /* Pull-enable or pull-up control register */ member
156 .puen = r1, \
H A Dpfc.c343 for (i = 0; pfc->info->bias_regs[i].puen; i++) { in sh_pfc_pin_to_bias_reg()
H A Dpfc-r8a7795.c6163 if (!(sh_pfc_read(pfc, reg->puen) & BIT(bit))) in r8a7795_pinmux_get_bias()
6182 enable = sh_pfc_read(pfc, reg->puen) & ~BIT(bit); in r8a7795_pinmux_set_bias()
6191 sh_pfc_write(pfc, reg->puen, enable); in r8a7795_pinmux_set_bias()
H A Dpfc-r8a7796.c6118 if (!(sh_pfc_read(pfc, reg->puen) & BIT(bit))) in r8a7796_pinmux_get_bias()
6137 enable = sh_pfc_read(pfc, reg->puen) & ~BIT(bit); in r8a7796_pinmux_set_bias()
6146 sh_pfc_write(pfc, reg->puen, enable); in r8a7796_pinmux_set_bias()