Home
last modified time | relevance | path

Searched refs:pllctl (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/ssb/
H A Ddriver_chipcommon_pmu.c95 u32 pmuctl, tmp, pllctl; in ssb_pmu0_pllinit_r0() local
144 pllctl = ssb_chipco_pll_read(cc, SSB_PMU0_PLLCTL0); in ssb_pmu0_pllinit_r0()
146 pllctl |= SSB_PMU0_PLLCTL0_PDIV_MSK; in ssb_pmu0_pllinit_r0()
148 pllctl &= ~SSB_PMU0_PLLCTL0_PDIV_MSK; in ssb_pmu0_pllinit_r0()
149 ssb_chipco_pll_write(cc, SSB_PMU0_PLLCTL0, pllctl); in ssb_pmu0_pllinit_r0()
152 pllctl = ssb_chipco_pll_read(cc, SSB_PMU0_PLLCTL1); in ssb_pmu0_pllinit_r0()
153 pllctl &= ~SSB_PMU0_PLLCTL1_STOPMOD; in ssb_pmu0_pllinit_r0()
154 pllctl &= ~(SSB_PMU0_PLLCTL1_WILD_IMSK | SSB_PMU0_PLLCTL1_WILD_FMSK); in ssb_pmu0_pllinit_r0()
155 pllctl |= ((u32)e->wb_int << SSB_PMU0_PLLCTL1_WILD_IMSK_SHIFT) & SSB_PMU0_PLLCTL1_WILD_IMSK; in ssb_pmu0_pllinit_r0()
156 pllctl |= ((u32)e->wb_frac << SSB_PMU0_PLLCTL1_WILD_FMSK_SHIFT) & SSB_PMU0_PLLCTL1_WILD_FMSK; in ssb_pmu0_pllinit_r0()
[all …]
/openbmc/u-boot/arch/arm/mach-davinci/
H A Ddm365_lowlevel.c30 clrbits_le32(&dv_pll0_regs->pllctl, PLLCTL_PLLPWRDN); in dm365_pll1_init()
32 clrbits_le32(&dv_pll0_regs->pllctl, PLLCTL_RES_9); in dm365_pll1_init()
33 setbits_le32(&dv_pll0_regs->pllctl, in dm365_pll1_init()
40 clrbits_le32(&dv_pll0_regs->pllctl, PLLCTL_PLLENSRC); in dm365_pll1_init()
43 clrbits_le32(&dv_pll0_regs->pllctl, PLLCTL_PLLEN); in dm365_pll1_init()
48 setbits_le32(&dv_pll0_regs->pllctl, PLLCTL_PLLRST); in dm365_pll1_init()
53 clrbits_le32(&dv_pll0_regs->pllctl, PLLCTL_PLLRST); in dm365_pll1_init()
97 setbits_le32(&dv_pll0_regs->pllctl, PLLCTL_PLLEN); in dm365_pll1_init()
107 clrbits_le32(&dv_pll1_regs->pllctl, PLLCTL_PLLPWRDN); in dm365_pll2_init()
114 clrbits_le32(&dv_pll1_regs->pllctl, PLLCTL_RES_9); in dm365_pll2_init()
[all …]
H A Dda850_lowlevel.c46 clrbits_le32(&reg->pllctl, PLLCTL_PLLENSRC); in da850_pll_init()
48 clrbits_le32(&reg->pllctl, PLLCTL_EXTCLKSRC); in da850_pll_init()
51 clrbits_le32(&reg->pllctl, PLLCTL_PLLEN); in da850_pll_init()
60 dv_maskbits(&reg->pllctl, ~PLLCTL_RES_9); in da850_pll_init()
61 setbits_le32(&reg->pllctl, in da850_pll_init()
66 clrbits_le32(&reg->pllctl, PLLCTL_PLLRST); in da850_pll_init()
69 setbits_le32(&reg->pllctl, PLLCTL_PLLDIS); in da850_pll_init()
76 clrbits_le32(&reg->pllctl, PLLCTL_PLLPWRDN); in da850_pll_init()
79 clrbits_le32(&reg->pllctl, PLLCTL_PLLDIS); in da850_pll_init()
137 setbits_le32(&reg->pllctl, PLLCTL_PLLRST); in da850_pll_init()
[all …]
/openbmc/linux/sound/pci/ctxfi/
H A Dcthw20k2.c1304 unsigned int pllctl; in hw_pll_init() local
1310 pllctl = 0x20C00000; in hw_pll_init()
1311 set_field(&pllctl, PLLCTL_B, 0); in hw_pll_init()
1312 set_field(&pllctl, PLLCTL_FD, 48000 == rsr ? 16 - 4 : 147 - 4); in hw_pll_init()
1313 set_field(&pllctl, PLLCTL_RD, 48000 == rsr ? 1 - 1 : 10 - 1); in hw_pll_init()
1314 hw_write_20kx(hw, PLL_CTL, pllctl); in hw_pll_init()
1317 pllctl = hw_read_20kx(hw, PLL_CTL); in hw_pll_init()
1318 set_field(&pllctl, PLLCTL_FD, 48000 == rsr ? 16 - 2 : 147 - 2); in hw_pll_init()
1319 hw_write_20kx(hw, PLL_CTL, pllctl); in hw_pll_init()
1328 get_field(pllctl, PLLCTL_B)) in hw_pll_init()
[all …]
H A Dcthw20k1.c1309 unsigned int pllctl; in hw_pll_init() local
1312 pllctl = (48000 == rsr) ? 0x1480a001 : 0x1480a731; in hw_pll_init()
1314 if (hw_read_20kx(hw, PLLCTL) == pllctl) in hw_pll_init()
1317 hw_write_20kx(hw, PLLCTL, pllctl); in hw_pll_init()
/openbmc/u-boot/arch/arm/mach-davinci/include/mach/
H A Dpll_defs.h14 unsigned int pllctl; /* 0x100 */ member
H A Dhardware.h397 dv_reg pllctl; member