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Searched refs:pll_div2_sel (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock.c250 unsigned int pll_div2_sel, fout_sel; in exynos5_get_pll_clk() local
280 pll_div2_sel = readl(&clk->pll_div2_sel); in exynos5_get_pll_clk()
284 fout_sel = (pll_div2_sel >> MPLL_FOUT_SEL_SHIFT) in exynos5_get_pll_clk()
288 fout_sel = (pll_div2_sel >> BPLL_FOUT_SEL_SHIFT) in exynos5_get_pll_clk()
H A Dclock_init_exynos5.c592 writel(CLK_REG_DISABLE, &clk->pll_div2_sel); in exynos5250_system_clock_init()
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dclock.h856 unsigned int pll_div2_sel; member
1273 unsigned int pll_div2_sel; member