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Searched refs:pll8 (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.h207 u32 ebb0, ebb4, pll0, pll1, pll2, pll3, pll6, pll8, pll9, pll10, pcsdw12; member
H A Dintel_dpll_mgr.c1974 PORT_PLL_TARGET_CNT_MASK, pll->state.hw_state.pll8); in bxt_ddi_pll_enable()
2084 hw_state->pll8 = intel_de_read(dev_priv, BXT_PORT_PLL(phy, ch, 8)); in bxt_ddi_pll_get_hw_state()
2085 hw_state->pll8 &= PORT_PLL_TARGET_CNT_MASK; in bxt_ddi_pll_get_hw_state()
2222 dpll_hw_state->pll8 = PORT_PLL_TARGET_CNT(targ_cnt); in bxt_ddi_set_dpll_hw_state()
2342 hw_state->pll8, in bxt_dump_hw_state()
H A Dintel_display.c5334 PIPE_CONF_CHECK_X(dpll_hw_state.pll8); in intel_pipe_config_compare()
/openbmc/linux/drivers/clk/qcom/
H A Dgcc-mdm9615.c89 static struct clk_pll pll8 = { variable
111 &pll8.clkr.hw,
1618 [PLL8] = &pll8.clkr,
H A Dgcc-msm8660.c26 static struct clk_pll pll8 = { variable
50 &pll8.clkr.hw
2512 [PLL8] = &pll8.clkr,
H A Dgcc-msm8960.c59 static struct clk_pll pll8 = { variable
83 &pll8.clkr.hw
3244 [PLL8] = &pll8.clkr,
3472 [PLL8] = &pll8.clkr,
H A Dgcc-ipq806x.c90 static struct clk_pll pll8 = { variable
112 &pll8.clkr.hw,
3071 [PLL8] = &pll8.clkr,