Searched refs:pll1_mult (Results 1 – 10 of 10) sorted by relevance
31 unsigned int pll1_mult; member
40 u8 pll1_mult; member
163 rate = (gen2_clk_get_rate(&parent) * pll_config->pll1_mult) / 2; in gen2_clk_get_rate()166 core->parent, pll_config->pll1_mult, rate); in gen2_clk_get_rate()
220 rate = gen3_clk_get_rate64(&parent) * pll_config->pll1_mult; in gen3_clk_get_rate64()224 core->parent, pll_config->pll1_mult, in gen3_clk_get_rate64()
28 u8 pll1_mult; member
55 u8 pll1_mult; member
72 u8 pll1_mult; member
317 mult = cpg_pll_config->pll1_mult / 2; in rcar_gen2_cpg_clk_register()
351 mult = cpg_pll_config->pll1_mult; in rcar_gen4_cpg_clk_register()
376 mult = cpg_pll_config->pll1_mult; in rcar_gen3_cpg_clk_register()