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Searched refs:pipe_ctx (Results 1 – 25 of 108) sorted by relevance

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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.h36 int dcn10_get_vupdate_offset_from_vsync(struct pipe_ctx *pipe_ctx);
39 struct pipe_ctx *pipe_ctx,
42 void dcn10_setup_vupdate_interrupt(struct dc *dc, struct pipe_ctx *pipe_ctx);
44 struct pipe_ctx *pipe_ctx,
55 struct pipe_ctx *pipe,
57 void dcn10_cursor_lock(struct dc *dc, struct pipe_ctx *pipe, bool lock);
60 struct pipe_ctx *pipe_ctx,
62 void dcn10_unblank_stream(struct pipe_ctx *pipe_ctx,
65 struct pipe_ctx *pipe_ctx,
69 bool dcn10_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
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H A Ddcn10_hw_sequencer.c97 struct pipe_ctx *pipe_ctx; in dcn10_lock_all_pipes() local
98 struct pipe_ctx *old_pipe_ctx; in dcn10_lock_all_pipes()
103 old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn10_lock_all_pipes()
104 pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn10_lock_all_pipes()
105 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes()
111 if (pipe_ctx->top_pipe || in dcn10_lock_all_pipes()
112 !pipe_ctx->stream || in dcn10_lock_all_pipes()
113 (!pipe_ctx->plane_state && !old_pipe_ctx->plane_state) || in dcn10_lock_all_pipes()
115 pipe_ctx->stream->mall_stream_config.type == SUBVP_PHANTOM) in dcn10_lock_all_pipes()
119 dc->hwss.pipe_control_lock(dc, pipe_ctx, true); in dcn10_lock_all_pipes()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce60/
H A Ddce60_hw_sequencer.c55 struct pipe_ctx *pipe_ctx = NULL; in dce60_should_enable_fbc() local
71 if (res_ctx->pipe_ctx[i].stream) { in dce60_should_enable_fbc()
73 pipe_ctx = &res_ctx->pipe_ctx[i]; in dce60_should_enable_fbc()
75 if (!pipe_ctx) in dce60_should_enable_fbc()
79 if (pipe_ctx->pipe_idx != underlay_idx) { in dce60_should_enable_fbc()
89 if (!pipe_ctx->stream->link) in dce60_should_enable_fbc()
93 if (pipe_ctx->stream->link->connector_signal != SIGNAL_TYPE_EDP) in dce60_should_enable_fbc()
97 if (pipe_ctx->stream->link->psr_settings.psr_feature_enabled) in dce60_should_enable_fbc()
101 if (!pipe_ctx->plane_state) in dce60_should_enable_fbc()
105 if (pipe_ctx->plane_state->tiling_info.gfx8.array_mode == DC_ARRAY_LINEAR_GENERAL) in dce60_should_enable_fbc()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dhw_sequencer.h35 struct pipe_ctx;
52 struct pipe_ctx *pipe_ctx; member
57 struct pipe_ctx *pipe_ctx; member
62 struct pipe_ctx *pipe_ctx; member
68 struct pipe_ctx *pipe_ctx; member
74 struct pipe_ctx *pipe_ctx; member
79 struct pipe_ctx *pipe_ctx; member
84 struct pipe_ctx *pipe_ctx; member
88 struct pipe_ctx *pipe_ctx; member
98 struct pipe_ctx *pipe_ctx; member
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H A Dhw_sequencer_private.h54 struct pipe_ctx;
75 void (*disable_stream_gating)(struct dc *dc, struct pipe_ctx *pipe_ctx);
76 void (*enable_stream_gating)(struct dc *dc, struct pipe_ctx *pipe_ctx);
80 struct pipe_ctx *pipe_ctx);
82 struct pipe_ctx *pipe_ctx);
83 void (*update_mpcc)(struct dc *dc, struct pipe_ctx *pipe_ctx);
85 struct pipe_ctx *pipe_ctx,
88 struct pipe_ctx *pipe_ctx,
98 struct pipe_ctx *pipe_ctx,
101 struct pipe_ctx *pipe_ctx,
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H A Dlink_hwss.h38 struct pipe_ctx;
49 void (*set_hblank_min_symbol_width)(struct pipe_ctx *pipe_ctx,
52 void (*set_throttled_vcp_size)(struct pipe_ctx *pipe_ctx,
77 void (*setup_stream_encoder)(struct pipe_ctx *pipe_ctx);
78 void (*reset_stream_encoder)(struct pipe_ctx *pipe_ctx);
79 void (*setup_stream_attribute)(struct pipe_ctx *pipe_ctx);
83 void (*setup_audio_output)(struct pipe_ctx *pipe_ctx,
85 void (*enable_audio_packet)(struct pipe_ctx *pipe_ctx);
86 void (*disable_audio_packet)(struct pipe_ctx *pipe_ctx);
H A Dresource.h106 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
112 void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
139 struct pipe_ctx *pipe_ctx);
258 bool resource_is_pipe_type(const struct pipe_ctx *pipe_ctx, enum pipe_type type);
281 bool resource_is_for_mpcc_combine(const struct pipe_ctx *pipe_ctx);
293 const struct pipe_ctx *cur_opp_head);
331 struct pipe_ctx *resource_find_free_secondary_pipe_legacy(
334 const struct pipe_ctx *primary_pipe);
343 int resource_get_num_mpc_splits(const struct pipe_ctx *pipe);
352 int resource_get_num_odm_splits(const struct pipe_ctx *pipe);
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_hwseq.h32 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
34 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
41 void dcn20_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx);
42 void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx);
43 bool dcn20_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
45 bool dcn20_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
48 struct pipe_ctx *pipe_ctx,
52 void dcn20_enable_stream(struct pipe_ctx *pipe_ctx);
53 void dcn20_unblank_stream(struct pipe_ctx *pipe_ctx,
55 void dcn20_disable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx);
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H A Ddcn20_hwseq.c99 struct pipe_ctx *pipe_ctx, in dcn20_setup_gsl_group_as_lock() argument
111 if (pipe_ctx->stream_res.gsl_group > 0) in dcn20_setup_gsl_group_as_lock()
116 pipe_ctx->stream_res.gsl_group = group_idx; in dcn20_setup_gsl_group_as_lock()
138 group_idx = pipe_ctx->stream_res.gsl_group; in dcn20_setup_gsl_group_as_lock()
142 pipe_ctx->stream_res.gsl_group = 0; in dcn20_setup_gsl_group_as_lock()
166 if (pipe_ctx->stream_res.tg->funcs->set_gsl != NULL && in dcn20_setup_gsl_group_as_lock()
167 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select != NULL) { in dcn20_setup_gsl_group_as_lock()
168 pipe_ctx->stream_res.tg->funcs->set_gsl( in dcn20_setup_gsl_group_as_lock()
169 pipe_ctx->stream_res.tg, in dcn20_setup_gsl_group_as_lock()
172 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select( in dcn20_setup_gsl_group_as_lock()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_hw_sequencer.c278 dce110_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, in dce110_set_input_transfer_func() argument
281 struct input_pixel_processor *ipp = pipe_ctx->plane_res.ipp; in dce110_set_input_transfer_func()
606 dce110_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, in dce110_set_output_transfer_func() argument
609 struct transform *xfm = pipe_ctx->plane_res.xfm; in dce110_set_output_transfer_func()
631 void dce110_update_info_frame(struct pipe_ctx *pipe_ctx) in dce110_update_info_frame() argument
636 ASSERT(pipe_ctx->stream); in dce110_update_info_frame()
638 if (pipe_ctx->stream_res.stream_enc == NULL) in dce110_update_info_frame()
641 is_hdmi_tmds = dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal); in dce110_update_info_frame()
642 is_dp = dc_is_dp_signal(pipe_ctx->stream->signal); in dce110_update_info_frame()
648 pipe_ctx->stream_res.stream_enc->funcs->update_hdmi_info_packets( in dce110_update_info_frame()
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H A Ddce110_hw_sequencer.h43 void dce110_enable_stream(struct pipe_ctx *pipe_ctx);
45 void dce110_disable_stream(struct pipe_ctx *pipe_ctx);
47 void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,
50 void dce110_blank_stream(struct pipe_ctx *pipe_ctx);
52 void dce110_enable_audio_stream(struct pipe_ctx *pipe_ctx);
53 void dce110_disable_audio_stream(struct pipe_ctx *pipe_ctx);
55 void dce110_update_info_frame(struct pipe_ctx *pipe_ctx);
57 void dce110_set_avmute(struct pipe_ctx *pipe_ctx, bool enable);
86 bool dce110_set_backlight_level(struct pipe_ctx *pipe_ctx,
89 void dce110_set_abm_immediate_disable(struct pipe_ctx *pipe_ctx);
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c147 struct pipe_ctx *pipes[MAX_PIPES]; in link_set_all_streams_dpms_off_for_link()
183 const struct pipe_ctx *pipe) in is_master_pipe_for_link()
196 struct pipe_ctx *pipes[MAX_PIPES]) in link_get_master_pipes_with_dpms_on()
199 struct pipe_ctx *pipe = NULL; in link_get_master_pipes_with_dpms_on()
203 pipe = &state->res_ctx.pipe_ctx[i]; in link_get_master_pipes_with_dpms_on()
212 static bool get_ext_hdmi_settings(struct pipe_ctx *pipe_ctx, in get_ext_hdmi_settings() argument
219 pipe_ctx->stream->ctx->dc_bios->integrated_info; in get_ext_hdmi_settings()
309 static bool write_i2c(struct pipe_ctx *pipe_ctx, in write_i2c() argument
320 cmd.speed = pipe_ctx->stream->ctx->dc->caps.i2c_speed_in_khz; in write_i2c()
328 if (dm_helpers_submit_i2c(pipe_ctx->stream->ctx, in write_i2c()
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H A Dlink_dpms.h32 struct pipe_ctx *pipe_ctx);
33 void link_set_dpms_off(struct pipe_ctx *pipe_ctx);
42 struct pipe_ctx *pipes[MAX_PIPES]);
43 enum dc_status link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
44 enum dc_status link_reduce_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
45 bool link_set_dsc_pps_packet(struct pipe_ctx *pipe_ctx,
50 void link_set_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable);
51 bool link_set_dsc_enable(struct pipe_ctx *pipe_ctx, bool enable);
52 bool link_update_dsc_config(struct pipe_ctx *pipe_ctx);
/openbmc/linux/drivers/gpu/drm/amd/display/dc/link/hwss/
H A Dlink_hwss_dio.c29 void set_dio_throttled_vcp_size(struct pipe_ctx *pipe_ctx, in set_dio_throttled_vcp_size() argument
32 struct stream_encoder *stream_encoder = pipe_ctx->stream_res.stream_enc; in set_dio_throttled_vcp_size()
39 void setup_dio_stream_encoder(struct pipe_ctx *pipe_ctx) in setup_dio_stream_encoder() argument
41 struct link_encoder *link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link); in setup_dio_stream_encoder()
42 struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc; in setup_dio_stream_encoder()
45 pipe_ctx->stream_res.stream_enc->id, true); in setup_dio_stream_encoder()
46 if (dc_is_dp_signal(pipe_ctx->stream->signal)) in setup_dio_stream_encoder()
47 pipe_ctx->stream->ctx->dc->link_srv->dp_trace_source_sequence(pipe_ctx->stream->link, in setup_dio_stream_encoder()
56 void reset_dio_stream_encoder(struct pipe_ctx *pipe_ctx) in reset_dio_stream_encoder() argument
58 struct link_encoder *link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link); in reset_dio_stream_encoder()
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H A Dlink_hwss_hpo_dp.h31 void set_hpo_dp_throttled_vcp_size(struct pipe_ctx *pipe_ctx,
33 void set_hpo_dp_hblank_min_symbol_width(struct pipe_ctx *pipe_ctx,
36 void set_hpo_dp_hblank_min_symbol_width(struct pipe_ctx *pipe_ctx,
39 void setup_hpo_dp_stream_encoder(struct pipe_ctx *pipe_ctx);
40 void reset_hpo_dp_stream_encoder(struct pipe_ctx *pipe_ctx);
41 void setup_hpo_dp_stream_attribute(struct pipe_ctx *pipe_ctx);
53 void setup_hpo_dp_audio_output(struct pipe_ctx *pipe_ctx,
55 void enable_hpo_dp_audio_packet(struct pipe_ctx *pipe_ctx);
56 void disable_hpo_dp_audio_packet(struct pipe_ctx *pipe_ctx);
H A Dlink_hwss_hpo_dp.c33 void set_hpo_dp_throttled_vcp_size(struct pipe_ctx *pipe_ctx, in set_hpo_dp_throttled_vcp_size() argument
37 pipe_ctx->stream_res.hpo_dp_stream_enc; in set_hpo_dp_throttled_vcp_size()
39 pipe_ctx->link_res.hpo_dp_link_enc; in set_hpo_dp_throttled_vcp_size()
46 void set_hpo_dp_hblank_min_symbol_width(struct pipe_ctx *pipe_ctx, in set_hpo_dp_hblank_min_symbol_width() argument
51 pipe_ctx->stream_res.hpo_dp_stream_enc; in set_hpo_dp_hblank_min_symbol_width()
52 struct dc_crtc_timing *timing = &pipe_ctx->stream->timing; in set_hpo_dp_hblank_min_symbol_width()
56 pipe_ctx->stream->link, link_settings); in set_hpo_dp_hblank_min_symbol_width()
74 void setup_hpo_dp_stream_encoder(struct pipe_ctx *pipe_ctx) in setup_hpo_dp_stream_encoder() argument
76 struct hpo_dp_stream_encoder *stream_enc = pipe_ctx->stream_res.hpo_dp_stream_enc; in setup_hpo_dp_stream_encoder()
77 struct hpo_dp_link_encoder *link_enc = pipe_ctx->link_res.hpo_dp_link_enc; in setup_hpo_dp_stream_encoder()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_hwseq.c95 static void update_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable) in update_dsc_on_stream() argument
97 struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; in update_dsc_on_stream()
98 struct dc_stream_state *stream = pipe_ctx->stream; in update_dsc_on_stream()
99 struct pipe_ctx *odm_pipe; in update_dsc_on_stream()
103 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in update_dsc_on_stream()
116 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in update_dsc_on_stream()
122 dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst); in update_dsc_on_stream()
123 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in update_dsc_on_stream()
136 DC_LOG_DSC("Setting optc DSC config for tg instance %d:", pipe_ctx->stream_res.tg->inst); in update_dsc_on_stream()
137 pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg, in update_dsc_on_stream()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c615 const struct pipe_ctx *pipe_with_clk_src, in is_sharable_clk_src()
616 const struct pipe_ctx *pipe) in is_sharable_clk_src()
647 struct pipe_ctx *pipe_ctx) in resource_find_used_clk_src_for_sharing() argument
652 if (is_sharable_clk_src(&res_ctx->pipe_ctx[i], pipe_ctx)) in resource_find_used_clk_src_for_sharing()
653 return res_ctx->pipe_ctx[i].clock_source; in resource_find_used_clk_src_for_sharing()
735 int resource_get_num_mpc_splits(const struct pipe_ctx *pipe) in resource_get_num_mpc_splits()
738 const struct pipe_ctx *other_pipe = pipe->bottom_pipe; in resource_get_num_mpc_splits()
753 int resource_get_num_odm_splits(const struct pipe_ctx *pip
766 get_odm_split_index(struct pipe_ctx * pipe_ctx) get_odm_split_index() argument
782 get_mpc_split_index(struct pipe_ctx * pipe_ctx) get_mpc_split_index() argument
799 calculate_viewport_size(struct pipe_ctx * pipe_ctx) calculate_viewport_size() argument
844 calculate_odm_slice_in_timing_active(struct pipe_ctx * pipe_ctx) calculate_odm_slice_in_timing_active() argument
871 calculate_plane_rec_in_timing_active(struct pipe_ctx * pipe_ctx,const struct rect * rec_in) calculate_plane_rec_in_timing_active() argument
961 calculate_mpc_slice_in_timing_active(struct pipe_ctx * pipe_ctx,struct rect * plane_clip_rec) calculate_mpc_slice_in_timing_active() argument
994 adjust_recout_for_visual_confirm(struct rect * recout,struct pipe_ctx * pipe_ctx) adjust_recout_for_visual_confirm() argument
1020 calculate_recout(struct pipe_ctx * pipe_ctx) calculate_recout() argument
1176 calculate_scaling_ratios(struct pipe_ctx * pipe_ctx) calculate_scaling_ratios() argument
1292 calculate_inits_and_viewports(struct pipe_ctx * pipe_ctx) calculate_inits_and_viewports() argument
1388 resource_build_scaling_params(struct pipe_ctx * pipe_ctx) resource_build_scaling_params() argument
1710 resource_is_pipe_type(const struct pipe_ctx * pipe_ctx,enum pipe_type type) resource_is_pipe_type() argument
1745 resource_is_for_mpcc_combine(const struct pipe_ctx * pipe_ctx) resource_is_for_mpcc_combine() argument
1764 resource_get_otg_master(const struct pipe_ctx * pipe_ctx) resource_get_otg_master() argument
1773 resource_get_opp_head(const struct pipe_ctx * pipe_ctx) resource_get_opp_head() argument
1974 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; dc_remove_plane_from_context() local
2279 add_hpo_dp_link_enc_to_ctx(struct resource_context * res_ctx,const struct resource_pool * pool,struct pipe_ctx * pipe_ctx,struct dc_stream_state * stream) add_hpo_dp_link_enc_to_ctx() argument
2301 remove_hpo_dp_link_enc_from_ctx(struct resource_context * res_ctx,struct pipe_ctx * pipe_ctx,struct dc_stream_state * stream) remove_hpo_dp_link_enc_from_ctx() argument
2337 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; acquire_first_free_pipe() local
2630 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[tg_inst]; acquire_resource_from_hw_enabled_state() local
2727 struct pipe_ctx *pipe_ctx = NULL; resource_map_pool_resources() local
3126 struct pipe_ctx *pipe_ctx = &new_ctx->res_ctx.pipe_ctx[j]; dc_validate_global_state() local
3198 set_avi_info_frame(struct dc_info_packet * info_packet,struct pipe_ctx * pipe_ctx) set_avi_info_frame() argument
3659 resource_build_info_frame(struct pipe_ctx * pipe_ctx) resource_build_info_frame() argument
3710 struct pipe_ctx *pipe_ctx = resource_get_otg_master_for_stream( resource_map_clock_resources() local
3751 pipe_need_reprogram(struct pipe_ctx * pipe_ctx_old,struct pipe_ctx * pipe_ctx) pipe_need_reprogram() argument
4096 struct pipe_ctx *pipe_ctx_old, *pipe_ctx, *pipe_ctx_syncd; reset_syncd_pipes_from_disabled_pipes() local
4125 struct pipe_ctx *pipe_ctx, *pipe_ctx_check; check_syncd_pipes_for_disabled_master_pipe() local
4314 update_dp_encoder_resources_for_test_harness(const struct dc * dc,struct dc_state * context,struct pipe_ctx * pipe_ctx) update_dp_encoder_resources_for_test_harness() argument
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H A Ddc_hw_sequencer.c307 struct pipe_ctx *pipe_ctx, in get_mpctree_visual_confirm_color() argument
319 struct pipe_ctx *top_pipe = pipe_ctx; in get_mpctree_visual_confirm_color()
328 const struct pipe_ctx *pipe_ctx, in get_surface_visual_confirm_color() argument
333 switch (pipe_ctx->plane_res.scl_data.format) { in get_surface_visual_confirm_color()
337 if (pipe_ctx->plane_state->layer_index > 0) { in get_surface_visual_confirm_color()
347 if (pipe_ctx->plane_state->layer_index > 0) { in get_surface_visual_confirm_color()
366 if (pipe_ctx->plane_state->layer_index > 0) { in get_surface_visual_confirm_color()
378 struct pipe_ctx *pipe_ctx, in get_hdr_visual_confirm_color() argument
385 struct pipe_ctx *top_pipe_ctx = pipe_ctx; in get_hdr_visual_confirm_color()
428 struct pipe_ctx *pipe_ctx, in get_subvp_visual_confirm_color() argument
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/basics/
H A Ddc_common.c52 bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx) in is_lower_pipe_tree_visible() argument
54 if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible) in is_lower_pipe_tree_visible()
56 if (pipe_ctx->bottom_pipe && is_lower_pipe_tree_visible(pipe_ctx->bottom_pipe)) in is_lower_pipe_tree_visible()
61 bool is_upper_pipe_tree_visible(struct pipe_ctx *pipe_ctx) in is_upper_pipe_tree_visible() argument
63 if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible) in is_upper_pipe_tree_visible()
65 if (pipe_ctx->top_pipe && is_upper_pipe_tree_visible(pipe_ctx->top_pipe)) in is_upper_pipe_tree_visible()
70 bool is_pipe_tree_visible(struct pipe_ctx *pipe_ctx) in is_pipe_tree_visible() argument
72 if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible) in is_pipe_tree_visible()
74 if (pipe_ctx->top_pipe && is_upper_pipe_tree_visible(pipe_ctx->top_pipe)) in is_pipe_tree_visible()
76 if (pipe_ctx->bottom_pipe && is_lower_pipe_tree_visible(pipe_ctx->bottom_pipe)) in is_pipe_tree_visible()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/
H A Ddcn201_hwseq.c57 struct pipe_ctx *pipe_ctx, PHYSICAL_ADDRESS_LOC *addr) in patch_address_for_sbs_tb_stereo() argument
59 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
60 bool sec_split = pipe_ctx->top_pipe && in patch_address_for_sbs_tb_stereo()
61 pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
64 (pipe_ctx->stream->timing.timing_3d_format == in patch_address_for_sbs_tb_stereo()
66 pipe_ctx->stream->timing.timing_3d_format == in patch_address_for_sbs_tb_stereo()
73 if (pipe_ctx->stream->view_format != VIEW_3D_FORMAT_NONE && in patch_address_for_sbs_tb_stereo()
130 void dcn201_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx) in dcn201_update_plane_addr() argument
134 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in dcn201_update_plane_addr()
142 addr_patched = patch_address_for_sbs_tb_stereo(pipe_ctx, &addr); in dcn201_update_plane_addr()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_hwseq.h50 bool dcn32_set_mcm_luts(struct pipe_ctx *pipe_ctx,
54 struct pipe_ctx *pipe_ctx,
58 struct pipe_ctx *pipe_ctx, const struct dc_stream_state *stream);
61 struct pipe_ctx *pipe_ctx,
72 void dcn32_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx);
74 unsigned int dcn32_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsigned int *k1_div, uns…
76 void dcn32_set_pixels_per_cycle(struct pipe_ctx *pipe_ctx);
84 struct pipe_ctx *top_pipe_to_program,
89 void dcn32_unblank_stream(struct pipe_ctx *pipe_ctx,
92 bool dcn32_is_dp_dig_pixel_rate_div_policy(struct pipe_ctx *pipe_ctx);
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H A Ddcn32_hwseq.c229 struct pipe_ctx *pipe = &ctx->res_ctx.pipe_ctx[i]; in dcn32_calculate_cab_allocation()
348 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn32_commit_subvp_config() local
350 if (pipe_ctx->stream && pipe_ctx->stream->mall_stream_config.paired_stream && in dcn32_commit_subvp_config()
351 pipe_ctx->stream->mall_stream_config.type == SUBVP_MAIN) { in dcn32_commit_subvp_config()
370 struct pipe_ctx *top_pipe_to_program, in dcn32_subvp_pipe_control_lock()
376 struct pipe_ctx *pipe; in dcn32_subvp_pipe_control_lock()
379 pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_subvp_pipe_control_lock()
399 pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_subvp_pipe_control_lock()
418 struct pipe_ctx *pipe_ctx = params->subvp_pipe_control_lock_fast_params.pipe_ctx; in dcn32_subvp_pipe_control_lock_fast() local
421 if (pipe_ctx && pipe_ctx->stream && pipe_ctx->plane_state) { in dcn32_subvp_pipe_control_lock_fast()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_hwseq.h55 bool dcn30_set_blend_lut(struct pipe_ctx *pipe_ctx,
59 struct pipe_ctx *pipe_ctx,
62 struct pipe_ctx *pipe_ctx,
64 void dcn30_set_avmute(struct pipe_ctx *pipe_ctx, bool enable);
65 void dcn30_update_info_frame(struct pipe_ctx *pipe_ctx);
66 void dcn30_program_dmdata_engine(struct pipe_ctx *pipe_ctx);
76 struct pipe_ctx *pipe_ctx,
84 struct pipe_ctx *pipe_ctx,
90 void dcn30_set_static_screen_control(struct pipe_ctx **pipe_ctx,
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_hwseq.c129 void dcn21_PLAT_58856_wa(struct dc_state *context, struct pipe_ctx *pipe_ctx) in dcn21_PLAT_58856_wa() argument
131 if (!pipe_ctx->stream->dpms_off) in dcn21_PLAT_58856_wa()
134 pipe_ctx->stream->dpms_off = false; in dcn21_PLAT_58856_wa()
135 pipe_ctx->stream->ctx->dc->link_srv->set_dpms_on(context, pipe_ctx); in dcn21_PLAT_58856_wa()
136 pipe_ctx->stream->ctx->dc->link_srv->set_dpms_off(pipe_ctx); in dcn21_PLAT_58856_wa()
137 pipe_ctx->stream->dpms_off = true; in dcn21_PLAT_58856_wa()
179 void dcn21_set_abm_immediate_disable(struct pipe_ctx *pipe_ctx) in dcn21_set_abm_immediate_disable() argument
181 struct abm *abm = pipe_ctx->stream_res.abm; in dcn21_set_abm_immediate_disable()
182 uint32_t otg_inst = pipe_ctx->stream_res.tg->inst; in dcn21_set_abm_immediate_disable()
183 struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl; in dcn21_set_abm_immediate_disable()
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