| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 127 .phyclk_mhz = 600.0,
136 .phyclk_mhz = 810.0,
145 .phyclk_mhz = 810.0,
154 .phyclk_mhz = 810.0,
163 .phyclk_mhz = 810.0,
371 .phyclk_mhz = 600.0,
380 .phyclk_mhz = 810.0,
389 .phyclk_mhz = 810.0,
398 .phyclk_mhz = 810.0,
407 .phyclk_mhz = 810.0,
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn321/ |
| H A D | dcn321_fpu.c | 113 .phyclk_mhz = 810.0,
375 if (bw_params->clk_table.entries[i].phyclk_mhz > max_clk_data.phyclk_mhz) in build_synthetic_soc_states()
376 max_clk_data.phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in build_synthetic_soc_states()
421 if (max_clk_data.phyclk_mhz == 0) in build_synthetic_soc_states()
422 max_clk_data.phyclk_mhz = dcn3_21_soc.clock_limits[0].phyclk_mhz; in build_synthetic_soc_states()
429 entry.phyclk_mhz = max_clk_data.phyclk_mhz; in build_synthetic_soc_states()
714 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn321_update_bw_bounding_box_fpu()
715 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn321_update_bw_bounding_box_fpu()
724 max_phyclk_mhz = dcn3_21_soc.clock_limits[0].phyclk_mhz; in dcn321_update_bw_bounding_box_fpu()
811 dcn3_21_soc.clock_limits[i].phyclk_mhz = max_phyclk_mhz; in dcn321_update_bw_bounding_box_fpu()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | dcn314_fpu.c | 108 .phyclk_mhz = 600.0,
117 .phyclk_mhz = 810.0,
126 .phyclk_mhz = 810.0,
135 .phyclk_mhz = 810.0,
144 .phyclk_mhz = 810.0,
254 clock_limits[i].phyclk_mhz = dcn3_14_soc.clock_limits[closest_clk_lvl].phyclk_mhz; in dcn314_update_bw_bounding_box_fpu()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| H A D | dcn315_clk_mgr.c | 261 .phyclk_mhz = 810,
269 .phyclk_mhz = 810,
277 .phyclk_mhz = 810,
285 .phyclk_mhz = 810,
293 .phyclk_mhz = 810,
506 bw_params->clk_table.entries[i].phyclk_mhz = bw_params->clk_table.entries[j].phyclk_mhz; in dcn315_clk_mgr_helper_populate_bw_params()
554 if (!bw_params->clk_table.entries[i].phyclk_mhz) in dcn315_clk_mgr_helper_populate_bw_params()
555 bw_params->clk_table.entries[i].phyclk_mhz = def_max.phyclk_mhz; in dcn315_clk_mgr_helper_populate_bw_params()
563 ASSERT(bw_params->clk_table.entries[i-1].phyclk_mhz == def_max.phyclk_mhz); in dcn315_clk_mgr_helper_populate_bw_params()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| H A D | dcn301_fpu.c | 123 .phyclk_mhz = 600.0,
135 .phyclk_mhz = 600.0,
147 .phyclk_mhz = 810.0,
159 .phyclk_mhz = 810.0,
171 .phyclk_mhz = 810.0,
364 s[i].phyclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].phyclk_mhz; in dcn301_update_bw_bounding_box()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
| H A D | dcn302_fpu.c | 119 .phyclk_mhz = 300.0,
230 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn302_fpu_update_bw_bounding_box()
231 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn302_fpu_update_bw_bounding_box()
240 max_phyclk_mhz = dcn3_02_soc.clock_limits[0].phyclk_mhz; in dcn302_fpu_update_bw_bounding_box()
327 dcn3_02_soc.clock_limits[i].phyclk_mhz = max_phyclk_mhz; in dcn302_fpu_update_bw_bounding_box()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 227 .phyclk_mhz = 540.0,
238 .phyclk_mhz = 600.0,
249 .phyclk_mhz = 810.0,
260 .phyclk_mhz = 810.0,
271 .phyclk_mhz = 810.0,
283 .phyclk_mhz = 810.0,
338 .phyclk_mhz = 540.0,
349 .phyclk_mhz = 600.0,
360 .phyclk_mhz = 810.0,
371 .phyclk_mhz = 810.0,
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
| H A D | dcn303_fpu.c | 118 .phyclk_mhz = 300.0,
226 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn303_fpu_update_bw_bounding_box()
227 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn303_fpu_update_bw_bounding_box()
236 max_phyclk_mhz = dcn3_03_soc.clock_limits[0].phyclk_mhz; in dcn303_fpu_update_bw_bounding_box()
322 dcn3_03_soc.clock_limits[i].phyclk_mhz = max_phyclk_mhz; in dcn303_fpu_update_bw_bounding_box()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| H A D | dcn314_clk_mgr.c | 617 bw_params->clk_table.entries[i].phyclk_mhz = bw_params->clk_table.entries[j].phyclk_mhz; in dcn314_clk_mgr_helper_populate_bw_params()
656 bw_params->clk_table.entries[i].phyclk_mhz = def_max.phyclk_mhz; in dcn314_clk_mgr_helper_populate_bw_params()
678 if (!bw_params->clk_table.entries[i].phyclk_mhz) in dcn314_clk_mgr_helper_populate_bw_params()
679 bw_params->clk_table.entries[i].phyclk_mhz = def_max.phyclk_mhz; in dcn314_clk_mgr_helper_populate_bw_params()
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_socbb.h | 34 uint32_t phyclk_mhz; member
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_resource.c | 148 .phyclk_mhz = 810.0,
159 .phyclk_mhz = 810.0,
170 .phyclk_mhz = 810.0,
181 .phyclk_mhz = 810.0,
192 .phyclk_mhz = 810.0,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 124 .phyclk_mhz = 810.0,
2334 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn32_patch_dpm_table()
2335 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn32_patch_dpm_table()
2480 if (bw_params->clk_table.entries[i].phyclk_mhz > max_clk_data.phyclk_mhz) in build_synthetic_soc_states()
2481 max_clk_data.phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in build_synthetic_soc_states()
2526 if (max_clk_data.phyclk_mhz == 0) in build_synthetic_soc_states()
2527 max_clk_data.phyclk_mhz = dcn3_2_soc.clock_limits[0].phyclk_mhz; in build_synthetic_soc_states()
2534 entry.phyclk_mhz = max_clk_data.phyclk_mhz; in build_synthetic_soc_states()
2809 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn32_update_bw_bounding_box_fpu()
2810 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn32_update_bw_bounding_box_fpu()
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | clk_mgr.h | 93 unsigned int phyclk_mhz; member
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| H A D | dcn30_clk_mgr.c | 160 &clk_mgr_base->bw_params->clk_table.entries[0].phyclk_mhz, in dcn3_init_clocks()
468 unsigned int i, max_phyclk_req = clk_mgr_base->bw_params->clk_table.entries[0].phyclk_mhz * 1000; in dcn30_notify_link_rate_change()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | dcn30_fpu.c | 131 .phyclk_mhz = 300.0,
612 dcn30_bb_max_clk->max_phyclk_mhz = dcn3_0_soc.clock_limits[0].phyclk_mhz; in dcn30_fpu_update_max_clk()
661 dcn3_0_soc.clock_limits[i].phyclk_mhz = dcn30_bb_max_clk->max_phyclk_mhz; in dcn30_fpu_update_bw_bounding_box()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 167 double phyclk_mhz; member
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| H A D | display_mode_vba.c | 398 mode_lib->vba.PHYCLKPerState[i] = soc->clock_limits[i].phyclk_mhz; in fetch_socbb_params()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_resource.c | 2126 if (bw_params->clk_table.entries[i].phyclk_mhz > dcn30_bb_max_clk.max_phyclk_mhz) in dcn30_update_bw_bounding_box()
2127 dcn30_bb_max_clk.max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn30_update_bw_bounding_box()
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