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Searched refs:phy_con42 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Ddmc.h373 unsigned int phy_con42; member
419 unsigned int phy_con42; member
/openbmc/u-boot/arch/arm/mach-exynos/
H A Ddmc_init_ddr3.c61 writel(val, &phy0_ctrl->phy_con42); in ddr3_mem_ctrl_init()
62 writel(val, &phy1_ctrl->phy_con42); in ddr3_mem_ctrl_init()
504 writel(val, &phy0_ctrl->phy_con42); in ddr3_mem_ctrl_init()
505 writel(val, &phy1_ctrl->phy_con42); in ddr3_mem_ctrl_init()