Searched refs:phb3_error (Results 1 – 1 of 1) sorted by relevance
| /openbmc/qemu/hw/pci-host/ |
| H A D | pnv_phb3.c | 25 #define phb3_error(phb, fmt, ...) \ macro
288 phb3_error(phb, "invalid IODA table %d", table); in pnv_phb3_ioda_access()
393 phb3_error(phb, "LSIs out of reach: LSI base=%d total irq=%d", global, in pnv_phb3_remap_irqs()
398 phb3_error(phb, "More interrupts than supported: %d", count); in pnv_phb3_remap_irqs()
402 phb3_error(phb, "IRQ compare bits not in mask: comp=0x%x mask=0x%x", in pnv_phb3_remap_irqs()
483 phb3_error(phb, "Invalid register access, offset: 0x%"PRIx64" size: %d", in pnv_phb3_reg_write()
604 phb3_error(phb, "Invalid register access, offset: 0x%"PRIx64" size: %d", in pnv_phb3_reg_read()
692 phb3_error(phb, "Unknown IRQ to set %d", irq_num); in pnv_phb3_set_irq()
711 phb3_error(ds->phb, "DMA with RTT BAR disabled !"); in pnv_phb3_resolve_pe()
722 phb3_error(ds->phb, "Failed to read RTT entry at 0x%"PRIx64, addr); in pnv_phb3_resolve_pe()
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