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Searched refs:phase (Results 1 – 25 of 572) sorted by relevance

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/openbmc/linux/drivers/clk/hisilicon/
H A Dclk-hisi-phase.c30 static int hisi_phase_regval_to_degrees(struct clk_hisi_phase *phase, in hisi_phase_regval_to_degrees() argument
35 for (i = 0; i < phase->phase_num; i++) in hisi_phase_regval_to_degrees()
36 if (phase->phase_regvals[i] == regval) in hisi_phase_regval_to_degrees()
37 return phase->phase_degrees[i]; in hisi_phase_regval_to_degrees()
44 struct clk_hisi_phase *phase = to_clk_hisi_phase(hw); in hisi_clk_get_phase() local
47 regval = readl(phase->reg); in hisi_clk_get_phase()
48 regval = (regval & phase->mask) >> phase->shift; in hisi_clk_get_phase()
50 return hisi_phase_regval_to_degrees(phase, regval); in hisi_clk_get_phase()
53 static int hisi_phase_degrees_to_regval(struct clk_hisi_phase *phase, in hisi_phase_degrees_to_regval() argument
58 for (i = 0; i < phase->phase_num; i++) in hisi_phase_degrees_to_regval()
[all …]
/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_read_leveling.c91 u32 delay, phase, pup, cs; in ddr3_read_leveling_hw() local
108 phase = (reg >> REG_PHY_PHASE_OFFS) & in ddr3_read_leveling_hw()
111 dram_info->rl_val[cs][pup][P] = phase; in ddr3_read_leveling_hw()
112 if (phase > dram_info->rl_max_phase) in ddr3_read_leveling_hw()
113 dram_info->rl_max_phase = phase; in ddr3_read_leveling_hw()
114 if (phase < dram_info->rl_min_phase) in ddr3_read_leveling_hw()
115 dram_info->rl_min_phase = phase; in ddr3_read_leveling_hw()
181 u32 reg, cs, ecc, pup_num, phase, delay, pup; in ddr3_read_leveling_sw() local
290 phase = dram_info->rl_val[cs][pup][P]; in ddr3_read_leveling_sw()
292 ddr3_write_pup_reg(PUP_RL_MODE, cs, pup_num, phase, in ddr3_read_leveling_sw()
[all …]
H A Dddr3_write_leveling.c66 u32 reg, phase, delay, cs, pup; in ddr3_write_leveling_hw() local
117 phase = in ddr3_write_leveling_hw()
121 dram_info->wl_val[cs][pup][P] = phase; in ddr3_write_leveling_hw()
186 u32 cs, cnt, pup_num, sum, phase, delay, max_pup_num, pup, sdram_offset; in ddr3_wl_supplement() local
343 phase = in ddr3_wl_supplement()
351 [P] = phase; in ddr3_wl_supplement()
361 phase, delay); in ddr3_wl_supplement()
364 phase = in ddr3_wl_supplement()
373 if ((phase == 0) in ddr3_wl_supplement()
374 || ((phase == 1) in ddr3_wl_supplement()
[all …]
/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu_phase.c15 struct ccu_phase *phase = hw_to_ccu_phase(hw); in ccu_phase_get_phase() local
22 reg = readl(phase->common.base + phase->common.reg); in ccu_phase_get_phase()
23 delay = (reg >> phase->shift); in ccu_phase_get_phase()
24 delay &= (1 << phase->width) - 1; in ccu_phase_get_phase()
58 struct ccu_phase *phase = hw_to_ccu_phase(hw); in ccu_phase_set_phase() local
110 spin_lock_irqsave(phase->common.lock, flags); in ccu_phase_set_phase()
111 reg = readl(phase->common.base + phase->common.reg); in ccu_phase_set_phase()
112 reg &= ~GENMASK(phase->width + phase->shift - 1, phase->shift); in ccu_phase_set_phase()
113 writel(reg | (delay << phase->shift), in ccu_phase_set_phase()
114 phase->common.base + phase->common.reg); in ccu_phase_set_phase()
[all …]
/openbmc/linux/drivers/clk/sunxi/
H A Dclk-mod0.c173 struct mmc_phase *phase = to_mmc_phase(hw); in mmc_get_phase() local
179 value = readl(phase->reg); in mmc_get_phase()
180 delay = (value >> phase->offset) & 0x3; in mmc_get_phase()
215 struct mmc_phase *phase = to_mmc_phase(hw); in mmc_set_phase() local
266 spin_lock_irqsave(phase->lock, flags); in mmc_set_phase()
267 value = readl(phase->reg); in mmc_set_phase()
268 value &= ~GENMASK(phase->offset + 3, phase->offset); in mmc_set_phase()
269 value |= delay << phase->offset; in mmc_set_phase()
270 writel(value, phase->reg); in mmc_set_phase()
271 spin_unlock_irqrestore(phase->lock, flags); in mmc_set_phase()
[all …]
/openbmc/linux/drivers/gpu/drm/tidss/
H A Dtidss_dispc_regs.h120 #define DISPC_VID_FIR_COEF_H0(phase) (0x6c + (phase) * 4) argument
122 #define DISPC_VID_FIR_COEF_H0_C(phase) (0x90 + (phase) * 4) argument
125 #define DISPC_VID_FIR_COEF_H12(phase) (0xb4 + (phase) * 4) argument
127 #define DISPC_VID_FIR_COEF_H12_C(phase) (0xf4 + (phase) * 4) argument
130 #define DISPC_VID_FIR_COEF_V0(phase) (0x134 + (phase) * 4) argument
132 #define DISPC_VID_FIR_COEF_V0_C(phase) (0x158 + (phase) * 4) argument
135 #define DISPC_VID_FIR_COEF_V12(phase) (0x17c + (phase) * 4) argument
137 #define DISPC_VID_FIR_COEF_V12_C(phase) (0x1bc + (phase) * 4) argument
/openbmc/linux/drivers/hwmon/pmbus/
H A Dmp2888.c94 mp2888_read_phase(struct i2c_client *client, struct mp2888_data *data, int page, int phase, u8 reg) in mp2888_read_phase() argument
98 ret = pmbus_read_word_data(client, page, phase, reg); in mp2888_read_phase()
102 if (!((phase + 1) % 2)) in mp2888_read_phase()
128 mp2888_read_phases(struct i2c_client *client, struct mp2888_data *data, int page, int phase) in mp2888_read_phases() argument
132 switch (phase) { in mp2888_read_phases()
134 ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS1_2); in mp2888_read_phases()
137 ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS3_4); in mp2888_read_phases()
140 ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS5_6); in mp2888_read_phases()
143 ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS7_8); in mp2888_read_phases()
146 ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS9_10); in mp2888_read_phases()
[all …]
H A Dmp2856.c113 mp2856_read_word_helper(struct i2c_client *client, int page, int phase, u8 reg, in mp2856_read_word_helper() argument
116 int ret = pmbus_read_word_data(client, page, phase, reg); in mp2856_read_word_helper()
123 int phase, u8 reg) in mp2856_read_vout() argument
127 ret = mp2856_read_word_helper(client, page, phase, reg, in mp2856_read_vout()
141 int page, int phase, u8 reg) in mp2856_read_phase() argument
146 ret = pmbus_read_word_data(client, page, phase, reg); in mp2856_read_phase()
150 if (!((phase + 1) % MP2856_PAGE_NUM)) in mp2856_read_phase()
164 int page, int phase) in mp2856_read_phases() argument
169 switch (phase) { in mp2856_read_phases()
171 ret = mp2856_read_phase(client, data, page, phase, in mp2856_read_phases()
[all …]
H A Dmp2975.c130 mp2975_read_word_helper(struct i2c_client *client, int page, int phase, u8 reg, in mp2975_read_word_helper() argument
133 int ret = pmbus_read_word_data(client, page, phase, reg); in mp2975_read_word_helper()
197 int page, int phase, u8 reg) in mp2975_read_phase() argument
201 ret = pmbus_read_word_data(client, page, phase, reg); in mp2975_read_phase()
205 if (!((phase + 1) % MP2975_PAGE_NUM)) in mp2975_read_phase()
228 ret = pmbus_read_word_data(client, page, phase, PMBUS_READ_IOUT); in mp2975_read_phase()
238 int page, int phase) in mp2975_read_phases() argument
243 switch (phase) { in mp2975_read_phases()
245 ret = mp2975_read_phase(client, data, page, phase, in mp2975_read_phases()
249 ret = mp2975_read_phase(client, data, page, phase, in mp2975_read_phases()
[all …]
H A Dir35221.c25 int phase, int reg) in ir35221_read_word_data() argument
31 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
35 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
39 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
43 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
47 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
51 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
55 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
59 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
/openbmc/linux/drivers/char/
H A Dppdev.c404 pp->saved_state.phase = info->phase; in pp_do_ioctl()
406 info->phase = pp->state.phase; in pp_do_ioctl()
435 pp->state.phase = init_phase(mode); in pp_do_ioctl()
439 pp->pdev->port->ieee1284.phase = pp->state.phase; in pp_do_ioctl()
459 int phase; in pp_do_ioctl() local
461 if (copy_from_user(&phase, argp, sizeof(phase))) in pp_do_ioctl()
465 pp->state.phase = phase; in pp_do_ioctl()
468 pp->pdev->port->ieee1284.phase = phase; in pp_do_ioctl()
474 int phase; in pp_do_ioctl() local
477 phase = pp->pdev->port->ieee1284.phase; in pp_do_ioctl()
[all …]
/openbmc/linux/drivers/gpu/drm/imx/dcss/
H A Ddcss-scaler.c178 int phase; in dcss_scaler_gaussian_filter() local
183 for (phase = 0; phase < PSC_STORED_PHASES; phase++) { in dcss_scaler_gaussian_filter()
184 coef[phase][0] = 0; in dcss_scaler_gaussian_filter()
185 coef[phase][PSC_NUM_TAPS - 1] = 0; in dcss_scaler_gaussian_filter()
232 for (phase = 0; phase < PSC_STORED_PHASES; phase++) { in dcss_scaler_gaussian_filter()
237 sum += coef[phase][i]; in dcss_scaler_gaussian_filter()
239 ll_temp = coef[phase][i]; in dcss_scaler_gaussian_filter()
243 coef[phase][i] = (int)ll_temp; in dcss_scaler_gaussian_filter()
589 int i, phase; in dcss_scaler_program_5_coef_set() local
605 for (phase = (PSC_NUM_PHASES >> 1) - 1; in dcss_scaler_program_5_coef_set()
[all …]
/openbmc/linux/lib/zstd/compress/
H A Dzstd_cwksp.h153 ZSTD_cwksp_alloc_phase_e phase; member
273 ZSTD_cwksp_internal_advance_phase(ZSTD_cwksp* ws, ZSTD_cwksp_alloc_phase_e phase) in ZSTD_cwksp_internal_advance_phase() argument
275 assert(phase >= ws->phase); in ZSTD_cwksp_internal_advance_phase()
276 if (phase > ws->phase) { in ZSTD_cwksp_internal_advance_phase()
278 if (ws->phase < ZSTD_cwksp_alloc_buffers && in ZSTD_cwksp_internal_advance_phase()
279 phase >= ZSTD_cwksp_alloc_buffers) { in ZSTD_cwksp_internal_advance_phase()
284 if (ws->phase < ZSTD_cwksp_alloc_aligned && in ZSTD_cwksp_internal_advance_phase()
285 phase >= ZSTD_cwksp_alloc_aligned) { in ZSTD_cwksp_internal_advance_phase()
306 ws->phase = phase; in ZSTD_cwksp_internal_advance_phase()
324 ZSTD_cwksp_reserve_internal(ZSTD_cwksp* ws, size_t bytes, ZSTD_cwksp_alloc_phase_e phase) in ZSTD_cwksp_reserve_internal() argument
[all …]
/openbmc/linux/drivers/parport/
H A Dieee1284_ops.c52 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_ieee1284_write_compat()
138 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_ieee1284_write_compat()
171 port->ieee1284.phase = IEEE1284_PH_REV_DATA; in parport_ieee1284_read_nibble()
221 port->physport->ieee1284.phase = IEEE1284_PH_REV_IDLE; in parport_ieee1284_read_nibble()
224 port->physport->ieee1284.phase = IEEE1284_PH_HBUSY_DAVAIL; in parport_ieee1284_read_nibble()
259 port->physport->ieee1284.phase = IEEE1284_PH_REV_DATA; in parport_ieee1284_read_byte()
306 port->physport->ieee1284.phase = IEEE1284_PH_REV_IDLE; in parport_ieee1284_read_byte()
309 port->physport->ieee1284.phase = IEEE1284_PH_HBUSY_DAVAIL; in parport_ieee1284_read_byte()
345 port->ieee1284.phase = IEEE1284_PH_REV_IDLE; in ecp_forward_to_reverse()
348 port->ieee1284.phase = IEEE1284_PH_ECP_DIR_UNKNOWN; in ecp_forward_to_reverse()
[all …]
/openbmc/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_imem_ops.c19 ipc_imem_phase_get_string(ipc_imem->phase), if_id); in ipc_imem_sys_wwan_open()
24 ipc_imem_phase_get_string(ipc_imem->phase)); in ipc_imem_sys_wwan_open()
66 if (ipc_imem->phase != IPC_P_RUN) { in ipc_imem_sys_wwan_transmit()
68 ipc_imem_phase_get_string(ipc_imem->phase)); in ipc_imem_sys_wwan_transmit()
146 enum ipc_phase phase; in ipc_imem_is_channel_active() local
149 phase = ipc_imem->phase; in ipc_imem_is_channel_active()
152 switch (phase) { in ipc_imem_is_channel_active()
174 channel->channel_id, phase); in ipc_imem_is_channel_active()
203 curr_phase = ipc_imem->phase; in ipc_imem_sys_port_close()
294 ipc_imem_phase_get_string(ipc_imem->phase)); in ipc_imem_sys_port_open()
[all …]
H A Diosm_ipc_imem.c291 ipc_imem_phase_get_string(ipc_imem->phase), in ipc_imem_ipc_init_check()
540 return (ipc_imem->phase == IPC_P_RUN && in ipc_imem_get_exec_stage_buffered()
572 if (ipc_imem->phase != IPC_P_RUN) { in ipc_imem_run_state_worker()
645 enum ipc_phase old_phase, phase; in ipc_imem_handle_irq() local
654 old_phase = ipc_imem->phase; in ipc_imem_handle_irq()
664 phase = ipc_imem_phase_update(ipc_imem); in ipc_imem_handle_irq()
666 switch (phase) { in ipc_imem_handle_irq()
704 ipc_imem_phase_get_string(phase)); in ipc_imem_handle_irq()
772 if ((phase == IPC_P_PSI || phase == IPC_P_EBL) && in ipc_imem_handle_irq()
814 if (ipc_imem->phase != IPC_P_ROM) { in ipc_imem_phase_update_check()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_dccg.c53 int phase; in dccg21_update_dpp_dto() local
67 phase = (req_dppclk + 9999) / 10000; in dccg21_update_dpp_dto()
69 if (phase > modulo) { in dccg21_update_dpp_dto()
74 phase = modulo; in dccg21_update_dpp_dto()
85 phase = 10; in dccg21_update_dpp_dto()
89 DPPCLK0_DTO_PHASE, phase, in dccg21_update_dpp_dto()
/openbmc/linux/drivers/char/ipmi/
H A Dkcs_bmc_cdev_ipmi.c76 enum kcs_ipmi_phases phase; member
133 priv->phase = KCS_PHASE_ERROR; in kcs_bmc_ipmi_force_abort()
145 switch (priv->phase) { in kcs_bmc_ipmi_handle_data()
147 priv->phase = KCS_PHASE_WRITE_DATA; in kcs_bmc_ipmi_handle_data()
165 priv->phase = KCS_PHASE_WRITE_DONE; in kcs_bmc_ipmi_handle_data()
187 priv->phase = KCS_PHASE_IDLE; in kcs_bmc_ipmi_handle_data()
198 priv->phase = KCS_PHASE_ABORT_ERROR2; in kcs_bmc_ipmi_handle_data()
205 priv->phase = KCS_PHASE_IDLE; in kcs_bmc_ipmi_handle_data()
224 priv->phase = KCS_PHASE_WRITE_START; in kcs_bmc_ipmi_handle_cmd()
231 if (priv->phase != KCS_PHASE_WRITE_DATA) { in kcs_bmc_ipmi_handle_cmd()
[all …]
/openbmc/linux/fs/
H A Dfsopen.c142 fc->phase = FS_CONTEXT_CREATE_PARAMS; in SYSCALL_DEFINE2()
195 fc->phase = FS_CONTEXT_RECONF_PARAMS; in SYSCALL_DEFINE3()
217 if (fc->phase != FS_CONTEXT_CREATE_PARAMS) in vfs_cmd_create()
227 fc->phase = FS_CONTEXT_CREATING; in vfs_cmd_create()
232 fc->phase = FS_CONTEXT_FAILED; in vfs_cmd_create()
240 fc->phase = FS_CONTEXT_FAILED; in vfs_cmd_create()
246 fc->phase = FS_CONTEXT_AWAITING_MOUNT; in vfs_cmd_create()
255 if (fc->phase != FS_CONTEXT_RECONF_PARAMS) in vfs_cmd_reconfigure()
258 fc->phase = FS_CONTEXT_RECONFIGURING; in vfs_cmd_reconfigure()
262 fc->phase = FS_CONTEXT_FAILED; in vfs_cmd_reconfigure()
[all …]
/openbmc/phosphor-power/phosphor-regulators/docs/config_file/
H A Dlog_phase_fault.md5 Logs a redundant phase fault error for a voltage regulator. This action should
12 - An "N+1" regulator has one redundant phase
14 A phase fault occurs when a phase stops functioning properly. The redundancy
17 The phase fault type indicates the level of redundancy remaining **after** the
22 | n+1 | An "N+2" regulator has lost one redundant phase. The regulator is now at redundancy level …
H A Dphase_fault_detection.md5 Specifies how to detect and log redundant phase faults in a voltage regulator.
7 A voltage regulator is sometimes called a "phase controller" because it controls
10 A regulator may have redundant phases. If a redundant phase fails, the regulator
11 will continue to provide the desired output voltage. However, a phase fault
14 The technique used to detect a phase fault varies depending on the regulator
18 Phase fault detection is performed every 15 seconds. A phase fault must be
32 - Use the [log_phase_fault](log_phase_fault.md) action to log a phase fault
50 … array of strings | One or more comment lines describing the phase fault detection. …
63 "comments": ["Detect phase fault using I/O expander"],
72 "Detect N phase fault using I/O expander.",
/openbmc/linux/drivers/scsi/pcmcia/
H A Dnsp_cs.c231 scsi_pointer->phase = PH_UNDETERMINED; in nsp_queuecommand_lck()
371 unsigned char phase, arbit; in nsphw_start_selection() local
375 phase = nsp_index_read(base, SCSIBUSMON); in nsphw_start_selection()
376 if(phase != BUSMON_BUS_FREE) { in nsphw_start_selection()
383 scsi_pointer->phase = PH_ARBSTART; in nsphw_start_selection()
403 scsi_pointer->phase = PH_SELSTART; in nsphw_start_selection()
548 unsigned char phase, i_src; in nsp_expect_signal() local
554 phase = nsp_index_read(base, SCSIBUSMON); in nsp_expect_signal()
555 if (phase == 0xff) { in nsp_expect_signal()
564 if ((phase & mask) != 0 && (phase & BUSMON_PHASE_MASK) == current_phase) { in nsp_expect_signal()
[all …]
/openbmc/linux/include/trace/events/
H A Dclk.h200 TP_PROTO(struct clk_core *core, int phase),
202 TP_ARGS(core, phase),
206 __field( int, phase )
211 __entry->phase = phase;
214 TP_printk("%s %d", __get_str(name), (int)__entry->phase)
219 TP_PROTO(struct clk_core *core, int phase),
221 TP_ARGS(core, phase)
226 TP_PROTO(struct clk_core *core, int phase),
228 TP_ARGS(core, phase)
/openbmc/linux/drivers/mmc/core/
H A Dhost.c223 struct mmc_clk_phase *phase) in mmc_of_parse_timing_phase() argument
229 phase->valid = !rc; in mmc_of_parse_timing_phase()
230 if (phase->valid) { in mmc_of_parse_timing_phase()
231 phase->in_deg = degrees[0]; in mmc_of_parse_timing_phase()
232 phase->out_deg = degrees[1]; in mmc_of_parse_timing_phase()
242 &map->phase[MMC_TIMING_LEGACY]); in mmc_of_parse_clk_phase()
244 &map->phase[MMC_TIMING_MMC_HS]); in mmc_of_parse_clk_phase()
246 &map->phase[MMC_TIMING_SD_HS]); in mmc_of_parse_clk_phase()
248 &map->phase[MMC_TIMING_UHS_SDR12]); in mmc_of_parse_clk_phase()
250 &map->phase[MMC_TIMING_UHS_SDR25]); in mmc_of_parse_clk_phase()
[all …]
/openbmc/linux/drivers/leds/trigger/
H A Dledtrig-heartbeat.c27 unsigned int phase; member
52 switch (heartbeat_data->phase) { in led_heartbeat_function()
65 heartbeat_data->phase++; in led_heartbeat_function()
71 heartbeat_data->phase++; in led_heartbeat_function()
77 heartbeat_data->phase++; in led_heartbeat_function()
84 heartbeat_data->phase = 0; in led_heartbeat_function()
140 heartbeat_data->phase = 0; in heartbeat_trig_activate()

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