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Searched refs:pgtbl_cfg (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/iommu/arm/arm-smmu/
H A Dqcom_iommu.c233 struct io_pgtable_cfg pgtbl_cfg; in qcom_iommu_init_domain() local
241 pgtbl_cfg = (struct io_pgtable_cfg) { in qcom_iommu_init_domain()
252 pgtbl_ops = alloc_io_pgtable_ops(ARM_32_LPAE_S1, &pgtbl_cfg, qcom_domain); in qcom_iommu_init_domain()
260 domain->pgsize_bitmap = pgtbl_cfg.pgsize_bitmap; in qcom_iommu_init_domain()
261 domain->geometry.aperture_end = (1ULL << pgtbl_cfg.ias) - 1; in qcom_iommu_init_domain()
291 pgtbl_cfg.arm_lpae_s1_cfg.ttbr | in qcom_iommu_init_domain()
297 arm_smmu_lpae_tcr2(&pgtbl_cfg)); in qcom_iommu_init_domain()
299 arm_smmu_lpae_tcr(&pgtbl_cfg) | ARM_SMMU_TCR_EAE); in qcom_iommu_init_domain()
303 pgtbl_cfg.arm_lpae_s1_cfg.mair); in qcom_iommu_init_domain()
305 pgtbl_cfg.arm_lpae_s1_cfg.mair >> 32); in qcom_iommu_init_domain()
H A Darm-smmu-qcom.c137 const struct io_pgtable_cfg *pgtbl_cfg) in qcom_adreno_smmu_set_ttbr0_cfg() argument
149 if (!pgtbl_cfg) { in qcom_adreno_smmu_set_ttbr0_cfg()
164 tcr |= arm_smmu_lpae_tcr(pgtbl_cfg); in qcom_adreno_smmu_set_ttbr0_cfg()
168 cb->ttbr[0] = pgtbl_cfg->arm_lpae_s1_cfg.ttbr; in qcom_adreno_smmu_set_ttbr0_cfg()
209 struct io_pgtable_cfg *pgtbl_cfg, struct device *dev) in qcom_adreno_smmu_init_context() argument
227 pgtbl_cfg->quirks |= IO_PGTABLE_QUIRK_ARM_TTBR1; in qcom_adreno_smmu_init_context()
266 struct io_pgtable_cfg *pgtbl_cfg, struct device *dev) in qcom_smmu_init_context() argument
H A Darm-smmu.c455 struct io_pgtable_cfg *pgtbl_cfg) in arm_smmu_init_context_bank() argument
466 cb->tcr[0] = pgtbl_cfg->arm_v7s_cfg.tcr; in arm_smmu_init_context_bank()
468 cb->tcr[0] = arm_smmu_lpae_tcr(pgtbl_cfg); in arm_smmu_init_context_bank()
469 cb->tcr[1] = arm_smmu_lpae_tcr2(pgtbl_cfg); in arm_smmu_init_context_bank()
476 cb->tcr[0] = arm_smmu_lpae_vtcr(pgtbl_cfg); in arm_smmu_init_context_bank()
482 cb->ttbr[0] = pgtbl_cfg->arm_v7s_cfg.ttbr; in arm_smmu_init_context_bank()
490 if (pgtbl_cfg->quirks & IO_PGTABLE_QUIRK_ARM_TTBR1) in arm_smmu_init_context_bank()
491 cb->ttbr[1] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr; in arm_smmu_init_context_bank()
493 cb->ttbr[0] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr; in arm_smmu_init_context_bank()
496 cb->ttbr[0] = pgtbl_cfg->arm_lpae_s2_cfg.vttbr; in arm_smmu_init_context_bank()
[all …]
H A Darm-smmu-nvidia.c262 struct io_pgtable_cfg *pgtbl_cfg, in nvidia_smmu_init_context() argument
283 pgtbl_cfg->pgsize_bitmap = smmu->pgsize_bitmap; in nvidia_smmu_init_context()
H A Darm-smmu-impl.c72 struct io_pgtable_cfg *pgtbl_cfg, struct device *dev) in cavium_init_context() argument
/openbmc/linux/drivers/iommu/
H A Dapple-dart.c558 struct io_pgtable_cfg *pgtbl_cfg = in apple_dart_setup_translation() local
561 for (i = 0; i < pgtbl_cfg->apple_dart_cfg.n_ttbrs; ++i) in apple_dart_setup_translation()
563 pgtbl_cfg->apple_dart_cfg.ttbr[i]); in apple_dart_setup_translation()
576 struct io_pgtable_cfg pgtbl_cfg; in apple_dart_finalize_domain() local
592 pgtbl_cfg = (struct io_pgtable_cfg){ in apple_dart_finalize_domain()
601 alloc_io_pgtable_ops(dart->hw->fmt, &pgtbl_cfg, domain); in apple_dart_finalize_domain()
607 domain->pgsize_bitmap = pgtbl_cfg.pgsize_bitmap; in apple_dart_finalize_domain()
/openbmc/linux/drivers/iommu/arm/arm-smmu-v3/
H A Darm-smmu-v3.c2091 struct io_pgtable_cfg *pgtbl_cfg) in arm_smmu_domain_finalise_s1() argument
2097 typeof(&pgtbl_cfg->arm_lpae_s1_cfg.tcr) tcr = &pgtbl_cfg->arm_lpae_s1_cfg.tcr; in arm_smmu_domain_finalise_s1()
2117 cfg->cd.ttbr = pgtbl_cfg->arm_lpae_s1_cfg.ttbr; in arm_smmu_domain_finalise_s1()
2125 cfg->cd.mair = pgtbl_cfg->arm_lpae_s1_cfg.mair; in arm_smmu_domain_finalise_s1()
2150 struct io_pgtable_cfg *pgtbl_cfg) in arm_smmu_domain_finalise_s2() argument
2155 typeof(&pgtbl_cfg->arm_lpae_s2_cfg.vtcr) vtcr; in arm_smmu_domain_finalise_s2()
2163 vtcr = &pgtbl_cfg->arm_lpae_s2_cfg.vtcr; in arm_smmu_domain_finalise_s2()
2165 cfg->vttbr = pgtbl_cfg->arm_lpae_s2_cfg.vttbr; in arm_smmu_domain_finalise_s2()
2182 struct io_pgtable_cfg pgtbl_cfg; in arm_smmu_domain_finalise() local
2220 pgtbl_cfg = (struct io_pgtable_cfg) { in arm_smmu_domain_finalise()
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/openbmc/linux/drivers/gpu/drm/panfrost/
H A Dpanfrost_mmu.c127 struct io_pgtable_cfg *cfg = &mmu->pgtbl_cfg; in panfrost_mmu_enable()
631 mmu->pgtbl_cfg = (struct io_pgtable_cfg) { in panfrost_mmu_ctx_create()
640 mmu->pgtbl_ops = alloc_io_pgtable_ops(ARM_MALI_LPAE, &mmu->pgtbl_cfg, in panfrost_mmu_ctx_create()
H A Dpanfrost_device.h129 struct io_pgtable_cfg pgtbl_cfg; member
/openbmc/linux/drivers/iommu/amd/
H A Damd_iommu_types.h540 container_of((x), struct amd_io_pgtable, pgtbl_cfg)
543 struct io_pgtable_cfg pgtbl_cfg; member
H A Diommu.c2036 if (domain->iop.pgtbl_cfg.tlb) in protection_domain_free()
2137 pgtbl_ops = alloc_io_pgtable_ops(pgtable, &domain->iop.pgtbl_cfg, domain); in protection_domain_alloc()
2518 if (domain->iop.pgtbl_cfg.tlb) in amd_iommu_domain_direct_map()