Searched refs:pdcptr (Results 1 – 1 of 1) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_gmu.c | 515 void __iomem *pdcptr = a6xx_gmu_get_mmio(pdev, "gmu_pdc"); in a6xx_gmu_rpmh_init() local
520 if (IS_ERR(pdcptr)) in a6xx_gmu_rpmh_init()
580 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD_ENABLE_BANK, 7); in a6xx_gmu_rpmh_init()
581 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD_WAIT_FOR_CMPL_BANK, 0); in a6xx_gmu_rpmh_init()
582 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CONTROL, 0); in a6xx_gmu_rpmh_init()
583 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_MSGID, 0x10108); in a6xx_gmu_rpmh_init()
584 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_ADDR, 0x30010); in a6xx_gmu_rpmh_init()
585 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_DATA, 1); in a6xx_gmu_rpmh_init()
586 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_MSGID + 4, 0x10108); in a6xx_gmu_rpmh_init()
587 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS1_CMD0_ADDR + 4, 0x30000); in a6xx_gmu_rpmh_init()
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