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Searched refs:odt_config (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/drivers/ram/
H A Dmpc83xx_sdram.c346 u32 force_self_refresh, dll_reset, dqs_config, odt_config, in mpc83xx_sdram_probe() local
968 odt_config = dev_read_u32_default(dev, "odt_config", 0); in mpc83xx_sdram_probe()
969 switch (odt_config) { in mpc83xx_sdram_probe()
977 dev->name, odt_config); in mpc83xx_sdram_probe()
991 odt_config << SDRAM_CFG2_ODT_CFG | in mpc83xx_sdram_probe()
/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_axp_vars.h79 u32 odt_config[ODT_OPT] = { variable
H A Dddr3_spd.c190 extern u32 odt_config[ODT_OPT];
972 reg = odt_config[cs_ena];
/openbmc/u-boot/Documentation/devicetree/bindings/ram/
H A Dfsl,mpc83xx-mem-controller.txt191 - odt_config: ODT configuration; possible values:
295 odt_config = <ODT_ASSERT_READS>;
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_init.h130 extern u32 odt_config;
H A Dddr3_training_leveling.c297 if (odt_config != 0) { in ddr3_tip_dynamic_read_leveling()
749 if (odt_config != 0) { in ddr3_tip_dynamic_per_bit_read_leveling()
1151 if (odt_config != 0) { in ddr3_tip_dynamic_write_leveling()
1949 if (odt_config != 0) in mv_ddr_rl_dqs_burst()
H A Dddr3_training.c28 u32 odt_config = 1; variable
807 status &= ddr3_tip_validate_algo_var(odt_config, PARAM_UNDEFINED, "odt_config"); in ddr3_tip_validate_algo_components()
1552 if (odt_config != 0) { in ddr3_tip_freq_set()